DSP56362AD datasheet(20/168 Pages) MOTOROLA

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DSP56362 Advance Information

MOTOROLA

Signal/Connection Descriptions

Host Interface (HDI08)

HOST INTERFACE (HDI08)

The HDI08 provides a fast, 8-bit, parallel data port that may be connected directly to the host bus. The

HDI08 supports a variety of standard buses and can be directly connected to a number of industry

standard microcomputers, microprocessors, DSPs, and DMA hardware.

Host Port Configuration

Signal functions associated with the HDI08 vary according to the interface operating mode as determined

by the HDI08 port control register (HPCR). See 6.5.6 Host Port Control Register (HPCR) on

page Section 6-13 for detailed descriptions of this register and (See Host Interface (HDI08) on

page Section 6-1.) for descriptions of the other HDI08 configuration registers.

RESET

Input

Reset—RESET is an active-low, Schmitt-trigger input.

When asserted, the chip is placed in the reset state

and the internal phase generator is reset. The Schmitt-

trigger input allows a slowly rising input (such as a

capacitor charging) to reset the chip reliably. If RESET

is deasserted synchronous to CLKOUT, exact start-up

timing is guaranteed, allowing multiple processors to

start synchronously and operate together in “lock-

step.” When the RESET signal is deasserted, the initial

chip operating mode is latched from the MODA,

MODB, MODC, and MODD inputs. The RESET signal

must be asserted during power up. A stable EXTAL

signal must be supplied while RESET is being

asserted.

This input is 5 V tolerant.

Table 1-8 Interrupt and Mode Control (Continued)

Signal Name

Type

State during

Reset

Signal Description

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

DSP56362AD Datasheet(PDF) 20 Page - Motorola, Inc