CP3SP33SMSSLASHNOPB datasheet(321/407 Pages) TI1

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Reload/Capture A

TCRA_n

Timer/Counter

Clock Source

Action

TAn

Interrupt B

Interrupt A

Timer/Counter 1

TCNT1_n

Reload/Capture B

TCRB_n

Timer/Counter 2

TCNT2_n

PWM/Capture/Counter

Mode Select + Control

External Event

PCLK

Clock

TBn

DS448

CP3SP33

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SNOSCW5 – MAY 2013

frequency of T0IN divided by (1+ PRESET), in which PRESET is the value written to the TWMT0

2. Configure the Watchdog clock to use either T0IN or T0OUT by setting or clearing the TWCFG.WDCT0I

bit.

3. Write the initial value into the WDCNT register. This starts operation of the Watchdog and specifies the

maximum allowed number of Watchdog clock cycles between service operations. Starting from this

point, the Watchdog must be periodically serviced to prevent a device reset.

4. Set the T0CSR.RST bit to restart the TWMT0 timer.

5. Lock the Watchdog registers and enable the Watchdog Service Data Match Enable function by setting

bits 0, 1, 2, 3, and 5 in the TWCFG register.

6. Service the Watchdog by periodically writing the value 5Ch to the WDSDM register at an appropriate

rate. Servicing must occur at least once per period programmed into the WDCNT register, but no more

than once in a single Watchdog input clock cycle.

32 Dual Multi-Function Timers

The two Multi-Function Timer modules each contain a pair of 16-bit timer/counters. Each timer/counter unit

offers a choice of clock sources for operation and can be configured to operate in any of the following

modes:

•

Processor-Independent Pulse Width Modulation (PWM) mode, which generates pulses of a specified

width and duty cycle, and which also provides a general-purpose timer/counter.

•

Dual-Input Capture mode, which measures the elapsed time between occurrences of external events,

and which also provides a general-purpose timer/counter.

•

Dual Independent Timer mode, which generates system timing signals or counts occurrences of

external events.

•

Single-Input Capture and Single Timer mode, which provides one external event counter and one

system timer.

Each timer unit uses two I/O pins, called TAn and TBn. (Only TA0 is available in the FBGA-144 package.)

32.1 Timer Structure

Figure 32-1 is a block diagram showing the internal structure of the MFT. There are two main functional

blocks: a Timer/ Counter and Action block and a Clock Source block. The Timer/Counter and Action block

contains two separate timer/counter units, called Timer/Counter 1 and Timer/Counter 2.

Figure 32-1. Multi-Function Timer Block Diagram

Dual Multi-Function Timers

321

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