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CP3SP33SMS/NOPB Datasheet(PDF) 373 Page - Texas Instruments

Part # CP3SP33SMS/NOPB
Description  Connectivity Processor with Cache, DSP, and Bluetooth짰, USB, and Dual CAN Interfaces
PDF  407 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CP3SP33SMS/NOPB Datasheet(HTML) 373 Page - Texas Instruments

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CP3SP33
www.ti.com
SNOSCW5 – MAY 2013
36 Electrical Specifications
36.1
Absolute Maximum Ratings
(1)
If Military/Aerospace specified devices are required, contact the Texas Instruments Semiconductor Sales Office/Distributors
for availability and specifications.
MIN
MAX
UNIT
Supply voltage (IOVCC, RFVCC, TCDACVCC, UVCC)
3.6
V
Supply voltage (VCC, PLLVCC, ADVCC, TCADCVCC)
2.0
V
All input and output voltages with respect to GND
–2.0
Supply +0.2
V
ESD protection level (Human Body Model)
2
kV
Allowable sink/source current per signal pin
±10
mA
Total current into IOVCC pins
200
mA
Total current into VCC pins (source)
200
mA
Total current out of GND pins (sink)
200
mA
Latch-up immunity
±200
mA
Temperature under bias
–40
85
°C
Storage temperature range
–65
150
°C
(1)
Absolute maximum ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications are not
ensured when operating the device at absolute maximum ratings.
36.2
DC Electrical Characteristics: Temperature: –40°C
≤ T
A ≤ 85°C)
PARAMETER
CONDITIONS
MIN
MAX
UNIT
VCC
Core Logic Supply Voltage
1.62
1.98
V
IOVCC
I/O Supply Voltage
2.25/2.97
3.6
V
RFVCC
RF I/O Supply Voltage
2.25
3.6
V
PLLVCC
Analog PLL Supply Voltage
1.62
1.98
V
ADVCC
ADC Supply Voltage
1.62
1.98
V
UVCC
USB Supply Voltage
3
3.6
V
TCADCVCC
Codec ADC Supply Voltage
1.62
1.98
V
TCDACVCC
Codec DAC Voltage
2.97
3.6
V
VIL
Logical 0 Input Voltage (except as noted below)
–0.2
0.2 IOVCC
V
VIH
Logical 1 Input Voltage (except as noted below)
0.7 IOVCC
IOVCC + 0.2
V
Vxl1
X1CKI Logical 0 Input Voltage(1)
External X1 clock
-0.2
0.2 PLLVCC
V
Vxh1
X1CKI Logical 1 Input Voltage(1)
External X1 clock
0.7 PLLVCC
PLLVcc + 0.2
V
Vxl2
X2CKI Logical 0 Input Voltage(1)
External X2 clock
-0.2
0.2 PLLVCC
V
Vxh2
X2CKI Logical 1 Input Voltage(1)
External X2 clock
0.7 PLLVCC
PLLVCC + 0.2
V
Vhys
Hysteresis Loop Width (1)
0.05 IOVCC
V
IOL
Logical 0 Output Current (except as noted below)
VOL = 0.4 V, IOVCC = 3 V
10
mA
IOH
Logical 1 Output Current (except as noted below)
VOH = 2.4 V, IOVCC = 3 V
–10
mA
IOLACB
SDAn, SCLn Logical 0 Output Current
VOL = 0.4 V, IOVCC = 2.25 V
3
mA
IOHW
Weak Pullup Current(1)
VIL = 0 V, IOVCC = 3.6 V
–50
–200
µA
IL
High Impedance Input Leakage Current(2)
0 V
≤ Vin ≤ IOVCC
–2
2
µA
IO(Off)
Output Leakage Current (I/O pins in input mode)
0 V
≤ Vout ≤ IOVCC
–2
2
µA
Icca1
Digital Supply Current Active Mode(3)
VCC = 1.98 V, IOVCC = 3.6 V
200
mA
Iccps
Digital Supply Current Power Save Mode(4)
VCC = 1.98 V, IOVCC = 3.6 V
4
mA
Iccid
Digital Supply Current Idle Mode(5)
VCC = 1.98 V, IOVCC = 3.6 V
2
mA
(1)
Specified by design
(2)
Only for digital inputs. Some analog inputs such as TCMIC1P and TCMIC2P have input protection devices which conduct if the input is
taken high.
(3)
Run from internal memory (RAM), Iout = 0 mA, X1CKI = 12 MHz, both PLLs enabled at 60 MHz
(4)
Running from internal memory (RAM), Iout = 0 mA, XCKI1 = 12 MHz, PLLs disabled, X2CKI = 32.768 kHz
(5)
Iout = 0 mA, XCKI1 = Vcc, X2CKI = 32.768 kHz
Copyright © 2013, Texas Instruments Incorporated
Electrical Specifications
373
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