AS4DDR264M72PBG1-3SLASHXT datasheet(21/28 Pages) MICROSS

21 / 28 page

iPEM

4.8 Gb SDRAM-DDR2

AS4DDR264M72PBG1

Rev. 3.1 01/10

Micross Components reserves the right to change products or speciﬁcations without notice.

Parameter

Symbol

Units

Notes

Supply Voltage

VCC

I/O Reference Voltage

VREF

I/O Termination Voltag

VTT

MIN

TYP

MAX

1.7

1.8

1.9

VREF

0.51 x VCC

VREF + 0.04

0.49 x VCC

VREF - 0.04

0.50 x VCC

DC OPERATING CONDITIONS

1. VREF is expected to equal VCC/2 of the transmitting device and to track variations in the DC level of the same. Peak-to-peak noise on VREF may not exceed ± 1 percent of the DC value. Peak-to-

peak AC noise on VREF may not exceed ±2 percent of VREF. This measurement is to be taken at the

nearest VREF bypass capacitor.

2. VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal to VREF and must track

variations in the DC level of VREF.

ABSOLUTE MAXIMUM RATINGS

Min

Max

Unit

-1.0

2.3

-0.5

2.3

-55.0

125.0

-55.0

125.0

-5

-10

Voltage on any pin relative to V SS

Storage Temperature

RAS\, CAS\, WE\, CS\,

CKE, DM, DQS, DQS\,

RDQS

Device Operating Temperature

-5

-10.0

10.0

-5

5uA

TCASE

ADDR, BAx

CK, CK\

IVREF

Input Leakage current; Any input 0V<VIN<VCC;

VREF = .5XVCC; Other balls not under test = 0V

VREF Leakage Current

IOZ

VOUT

VDD, DQ & ODT Disabled

Symbol

Parameter

VCC

VIN, VOUT

TSTG

Voltage on VCC pin relative to V SS

INPUT / OUTPUT CAPACITANCE

A = 25

C, f = 1 MHz, V

CC = 1.8V

Parameter

Symbol

Max

Unit

Input capacitance (A0-A12, BA0-BA2, CS\, RAS\, CAS\, WE\, CKE, ODT)

CADDR

Input capacitance CK, CK#

CIN2

8pF

Input capacitance DM, DQS, DQS#

CIN3

Input capacitance DQ0-71

COUT

AS4DDR264M72PBG1-3/XT Datasheet(PDF) 21 Page - Micross Components

AS4DDR264M72PBG1-3/XT Datasheet(HTML) 21 Page - Micross Components

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