iPEM

4.8 Gb SDRAM-DDR2

AS4DDR264M72PBG1

AS4DDR264M72PBG1

Rev. 3.1 01/10

25

Micross Components reserves the right to change products or specifications without notice.

AC OPERATING SPECIFICATIONS (CONTINUED)

-3

-38

-5

667Mbps

533Mbps

400Mbps

Symbol

MIN

MAX

MIN

MAX

MIN

MAX

Units

Address and Control input puslse width for each input

tIPW

0.6

0.6

0.6

tCK

Address and Control input setup time

200

250

350

ps

Address and Control input hold time

275

375

475

ps

CAS\ to CAS\ command delay

tCCD

222

tCK

ACTIVE to ACTIVE command (same bank)

tRC

55

55

55

ns

ACTIVE bank a to ACTIVE bank b Command

tRRD

10

10

10

ns

ACTIVE to READ or WRITE delay

tRCD

15

15

15

ns

4-Bank activate period

tFAW

50

50

50

ns

ACTIVE to PRECHARGE

tRAS

40

70000

1

40

70000

1

40

70000

1

ns

Internal READ to PRECHARGE command delay

tRTP

7.5

7.5

7.5

ns

WRITE recovery time

tWR

15

15

15

ns

Auto PRECHARGE WRITE recovery+PRECHARGE time

tDAL

tWR + tRP

tWR + tRP

tWR + tRP

ns

Internal WRITE to READ command delay

tWTR

7.5

7.5

10

ns

PRECHARGE command period

tRP

15

15

15

ns

PRECHARGE ALL command period

tRPA

tRP+tCL

tRP+tCL

tRP+tCL

ns

LOAD MODE, command Cycle time

tMRD

222

tCK

CKE LOW to CK, CK\ uncertainty

tDELAY

ns

REFRESH to ACTIVE or REFRESH to REFRESH

command Interval

Average periodic REFRESH interval [Industrial temp]

7.8

7.8

7.8

us

Average periodic REFRESH interval [Enhanced temp]

5.9

5.9

5.9

us

Average periodic REFRESH interval [Military temp]

3.9

3.9

3.9

us

Exit SELF REFRESH to non READ command

Exit SELF REFRESH to READ command

Exit SELF REFRESH timing reference

ODT turn-on delay

tAOND

2

2

2

2

2

2

tCK

ODT turn-on delay

tAOND

tAC(min)

tAC(max)+

700

tAC(min)

tAC(max)+

1000

tAC(min)

tAC(max)+

1000

ps

ODT turn-off delay

tAOPD

2.5

2.5

2.5

2.5

2.5

2.5

tCK

ODT turn-off delay

tAOF

tAC(min)

tAC(max)+

600

tAC(min)

tAC(max)+

600

tAC(min)

tAC(max)+

600

ps

ODT turn-on (power-down mode)

tAONPD

tAC(min) +

2000

2 x tCK +

tAC(max)+

1000

tAC(min) +

2000

2 x tCK +

tAC(max)+

1000

tAC(min) +

2000

2 x tCK +

tAC(max)+

1000

ps

ODT turn-off (power-down mode)

tAOFPD

tAC(min) +

2000

2.5 x tCK +

tAC(max)+

1000

tAC(min) +

2000

2.5 x tCK +

tAC(max)+

1000

tAC(min) +

2000

2.5 x tCK +

tAC(max)+

1000

ps

ODT to power-down entry latency

tANPD

3

3

3

tCK

ODT power-down exit latency

tAXPD

8

8

8

tCK

ODT enable from MRS command

tMOD

12

12

12

ns

Exit active POWER-DOWN to READ command, MR[12]=0

tXARD

2

2

2

tCK

Exit active POWER-DOWN to READ command, MR[12]=1

tSARDS

7 - AL

6 - AL

6 - AL

tCK

Exit PRECHARGE POWER-DOWN to any non READ

tXP

2

2

2

tCK

CKE Min. HIGH/LOW time

tCLE

3

3

3

tCK

Note 1: Max value reduced to 10,000ns at 125

70000

1

tIS + tCL + tIH

tRFC

tXSNR

tXSRD

tISXR

tRFC(min)+1

0

tRFC(min)+1

0

tIS + tCL + tIH

tIS + tCL + tIH

127

70000

1

127

70000

1

127

ps

tIS

200

tIS

tIS

Parameter

200

ns

tCK

ns

200

tRFC(min)+1

0