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HT45F5N Datasheet(PDF) 17 Page - Holtek Semiconductor Inc |
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HT45F5N Datasheet(HTML) 17 Page - Holtek Semiconductor Inc |
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17 / 202 page ![]() Rev. 1.00 1� �ove��e� 1�� �01� Rev. 1.00 17 �ove��e� 1�� �01� HT45F5N/HT45FH5N Power Bank ASSP Flash MCU HT45F5N/HT45FH5N Power Bank ASSP Flash MCU A.C. Characteristics Ta=�5°C Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions fSYS Syste� Clock (HIRC) VLVR ~ 5.5V fSYS=fHIRC=�MHz — � — MHz Syste� Clock (LIRC) VLVR ~ 5.5V fSYS=fLIRC=3�kHz — 3� — kHz fHIRC High Speed Inte�nal RC Oscillato� (HIRC) 5V Ta=�5°C -�% � +�% MHz 5V ± 0.5V Ta=0°C ~ 70°C -5% � +5% MHz 5V ± 0.5V Ta= -40°C ~ �5°C -7% � +7% MHz VLVR ~ 5.5V Ta=0°C ~ 70°C -7% � +7% MHz VLVR ~ 5.5V Ta= -40°C ~ �5°C -10% � +10% MHz fLIRC Low Speed Inte�nal RC Oscillato� (LIRC) 5V Ta=�5°C -10% 3� +10% kHz 5V ± 0.5V Ta= -40°C ~ �5°C -40% 3� +40% kHz VLVR ~ 5.5V Ta= -40°C ~ �5°C -50% 3� +�0% kHz tTCK xTCK Input Pin Mini�u� Pulse Width — — 0.3 — — μs tI�T Exte�nal Inte��upt Mini�u� Pulse Width — — 10 — — μs tRSTD Syste� Reset Delay Ti�e (Powe�-on Reset� LVR Ha�dwa�e Reset� LVR Softwa�e Reset� WDT Softwa�e Reset) — — �.3 1�.7 33.3 �s Syste� Reset Delay Ti�e (WDT Ti�e-Out Ha�dwa�e Cold Reset) — — �.3 1�.7 33.3 �s tSST Syste� Sta�t-up Ti�e� Pe�iod (Wake-up f�o� Powe� Down Mode and fSYS off) — fSYS=fHIRC ~ fHIRC/�4 1� — — tHIRC — fSYS=fLIRC � — — tLIRC Syste� Sta�t-Up Ti�e� Pe�iod (Slow Mode ↔ Normal Mode) — fHIRC off → on (HTO=1) 1� — — tHIRC Syste� Sta�t-Up Ti�e� Pe�iod (Wake-up f�o� Powe� Down Mode and fSYS on) — fSYS=fHIRC ~ fHIRC/�4 � — — tH — fSYS=fLIRC � — — tLIRC Syste� Sta�t-Up Ti�e� Pe�iod (WDT Ti�e-out Ha�dwa�e Cold Reset) — — 0 — — tH fI�C Syste� F�equency fo� I�C Standa�d Mode (100kHz) — �o clock de�ounce � — — MHz — � syste� clocks de�ounce 4 — — MHz — 4 syste� clocks de�ounce � — — MHz Syste� F�equency fo� I�C Fast Mode (400kHz) — �o clock de�ounce 5 — — MHz — � syste� clocks de�ounce 10 — — MHz — 4 syste� clocks de�ounce �0 — — MHz tSRESET Mini�u� Softwa�e Reset Width to Reset — — 45 90 1�0 μs |
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