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WM8960CGEFL/V Datasheet(PDF) 41 Page - Cirrus Logic |
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WM8960CGEFL/V Datasheet(HTML) 41 Page - Cirrus Logic |
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41 / 94 page ![]() WM8960 Rev 4.4 41 See "Volume Updates" for more information on volume update bits, zero cross and timeout operation. CLASS D SPEAKER OUTPUTS The SPK_LP/SPK_LN and SPK_RP/SPK_RN output pins are class D speaker drivers. Each pair is independently controlled and can drive an 8 BTL speaker (see “Class D Speaker Outputs”). Output mixer volume is relative to AVDD, while an additional boost stage is available to accommodate higher SPKVDD1/SPKVDD2 supply voltages. This allows AVDD to be run at a lower voltage to save power, while maximum output power can be delivered to the load, utilising the full range of SPKVDD1/SPKVDD2. Note that the BTL speaker connection provides an additional +6dB gain at the output. SPK_LP/ SPK_RP SPK_LN/ SPK_RN SPKLVOL[6:0] or SPKRVOL[6:0] LEFT OR RIGHT OUTPUT MIXER ACGAIN[2:0] SPKGND1=SPKGND2 SPKVDD1=SPKVDD2 AGND AVDD DCGAIN[2:0] or ACGAIN[2:0] 000 = 1.00x 001 = 1.27x 010 = 1.40x 011 = 1.52x 100 = 1.67x 101 = 1.80x VMID AVDD AGND DCGAIN[2:0] VMID x DCGAIN VMID x DCGAIN SPKVDD1/SPKVDD2 Signal x ACGAIN BTL Connection provides an additional 6dB gain Figure 14 Speaker Boost Operation REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R40 (28h) Left Speaker Volume 6:0 SPKLVOL [6:0] 0000000 (MUTE) SPK_LP/SPK_LN Volume 1111111 = +6dB … 1dB steps down to 0110000 = -73dB 0101111 to 0000000 = Analogue MUTE 7 SPKLZC 0 Left Speaker Zero Cross Enable 1 = Change gain on zero cross only 0 = Change gain immediately 8 SPKVU 0 Speaker Volume Update 0 = Store SPKLVOL in intermediate latch (no gain change) 1 = Update left and right channel gains (left = SPKLVOL, right = intermediate latch) R41 (29h) Right Speaker Volume 6:0 SPKRVOL [6:0] 0000000 (MUTE) SPK_RP/SPK_RN Volume 1111111 = +6dB … 1dB steps down to 0110000 = -73dB 0101111 to 0000000 = Analogue MUTE 7 SPKRZC 0 Right Speaker Zero Cross Enable 1 = Change gain on zero cross only 0 = Change gain immediately |
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