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WM8960CGEFL/V Datasheet(PDF) 42 Page - Cirrus Logic |
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WM8960CGEFL/V Datasheet(HTML) 42 Page - Cirrus Logic |
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42 / 94 page ![]() WM8960 42 Rev 4.4 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 8 SPKVU 0 Speaker Volume Update 0 = Store SPKRVOL in intermediate latch (no gain change) 1 = Update left and right channel gains (left = intermediate latch, right = SPKRVOL) R51 (33h) Class D Control (3) 5:3 DCGAIN [2:0] 000 (1.0x) DC Speaker Boost (Boosts speaker DC output level by up to 1.8 x on left and right channels) 000 = 1.00x boost (+0dB) 001 = 1.27x boost (+2.1dB) 010 = 1.40x boost (+2.9dB) 011 = 1.52x boost (+3.6dB) 100 = 1.67x boost (+4.5dB) 101 = 1.8x boost (+5.1dB) 110 to 111 = Reserved 2:0 ACGAIN [2:0] 000 (1.0x) AC Speaker Boost (Boosts speaker AC output signal by up to 1.8 x on left and right channels) 000 = 1.00x boost (+0dB) 001 = 1.27x boost (+2.1dB) 010 = 1.40x boost (+2.9dB) 011 = 1.52x boost (+3.6dB) 100 = 1.67x boost (+4.5dB) 101 = 1.8x boost (+5.1dB) 110 to 111 = Reserved Table 25 SPK_L/SPK_R Volume and Speaker Boost Control To prevent pop noise, DCGAIN and ACGAIN should not be modified while the speaker outputs are enabled. To avoid clipping at speaker ground, ACGAIN should not be greater than DCGAIN. To avoid clipping at speaker supply, SPKVDD1 and SPKVDD2 must be high enough to support the peak output voltage when using DCGAIN and ACGAIN functions. The peak output voltage is AVDD*(DCGAIN+ACGAIN)/2. DCGAIN should normally be set to the same value as ACGAIN. See "Volume Updates" for more information on volume update bits, zero cross and timeout operation. See "Class D Speaker Outputs" for more information on class D speaker operation. OUT3 OUTPUT The OUT3 pin can drive a 16 or 32 headphone or a line output or be used as a pseudo-ground for capless headphone drive (see “Headphone Output”). It can also drive out a mono mix of left and right output mixers (See “Output Signal Path”). |
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