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WM8960CGEFL/V Datasheet(PDF) 53 Page - Cirrus Logic

Part # WM8960CGEFL/V
Description  Speaker and Headphone Drivers for Portable Audio Applications
PDF  94 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8960CGEFL/V Datasheet(HTML) 53 Page - Cirrus Logic

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WM8960
Rev 4.4
53
LEFT CHANNEL
RIGHT CHANNEL
DACLRC/
ADCLRC
BCLK
DACDAT/
ADCDAT
1/fs
n
3
2
1
n-2 n-1
LSB
MSB
n
3
2
1
n-2 n-1
LSB
MSB
1 BCLK
1 BCLK
Input Word Length (WL)
Note: Input word length is defined by the WL register.
Timing is shown with LRP = 0
Figure 28 I2S Justified Audio Interface (assuming n-bit word length)
In DSP/PCM mode, the left channel MSB is available on either the 1st (mode B) or 2nd (mode A) rising
edge of BCLK (selectable by LRP) following a rising edge of LRC. Right channel data immediately
follows left channel data. Depending on word length, BCLK frequency and sample rate, there may be
unused BCLK cycles between the LSB of the right channel data and the next sample.
In device master mode, the LRC output will resemble the frame pulse shown in Figure 29 and Figure
30. In device slave mode, Figure 31 and Figure 32, it is possible to use any length of frame pulse less
than 1/fs, providing the falling edge of the frame pulse occurs greater than one BCLK period before
the rising edge of the next frame pulse.
LEFT CHANNEL
RIGHT CHANNEL
LRCLK
BCLK
DACDAT /
ADCDAT
n
3
2
1
n-2 n-1
LSB
MSB
n
3
2
1
n-2 n-1
1 BCLK
Input Word Length (WL)
1/fs
Figure 29 DSP/PCM Mode Audio Interface (mode A, LRP=0, Master)
LEFT CHANNEL
RIGHT CHANNEL
LRC
BCLK
DACDAT /
ADCDAT
n
3
2
1
n-2 n-1
LSB
MSB
n
3
2
1
n-2 n-1
1 BCLK
Input Word Length (WL)
1/fs
Figure 30 DSP/PCM Mode Audio Interface (mode B, LRP=1, Master)



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