WM8960CGEFLSLASHV datasheet(76/94 Pages) CIRRUS

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WM8960

Rev 4.4

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

6:4

MAXGAIN[2:0]

0000

Set Maximum Gain of PGA (During ALC

operation)

111 : +30dB

110 : +24dB

….(-6dB steps)

001 : -6dB

000 : -12dB

Automatic Level

Control

3:0

ALCL[3:0]

1011

ALC Target (Sets signal level at ADC input)

0000 = -22.5dB FS

0001 = -21.0dB FS

… (1.5dB steps)

1101 = -3.0dB FS

1110 = -1.5dB FS

1111 = -1.5dB FS

Automatic Level

Control

R18 (12h)

ALC (2)

Reserved

6:4

MINGAIN[2:0]

000

Set Minimum Gain of PGA (During ALC

operation)

000 = -17.25dB

001 = -11.25dB

010 = -5.25dB

011 = +0.75dB

100 = +6.75dB

101 = +12.75dB

110 = +18.75dB

111 = +24.75dB

Automatic Level

Control

3:0

HLD[3:0]

0000

ALC hold time before gain is increased.

0000 = 0ms

0001 = 2.67ms

0010 = 5.33ms

… (time doubles with every step)

1111 = 43.691s

Automatic Level

Control

R19 (13h)

ALC (3)

ALCMODE

Determines the ALC mode of operation:

0 = ALC mode

1 = Limiter mode

Automatic Level

Control

7:4

DCY[3:0]

0011

ALC decay (gain ramp-up) time

0000 = 24ms

0001 = 48ms

0010 = 96ms

… (time doubles with every step)

1010 or higher = 24.58s

Automatic Level

Control

3:0

ATK[3:0]

0010

ALC attack (gain ramp-down) time

0000 = 6ms

0001 = 12ms

0010 = 24ms

… (time doubles with every step)

1010 or higher = 6.14s

Automatic Level

Control

R20 (14h)

Reserved

WM8960CGEFL/V Datasheet(PDF) 76 Page - Cirrus Logic

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