EM78P372KSS20 datasheet(16/118 Pages) EMC

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EM78P372K

8-bit Microcontroller



Product Specification (V1.4) 05.11.2016

(This specification is subject to change without prior notice)



R2 and hardware stacks are 11-bit wide. The structure is depicted in the Data Memory

Configuration (next page).



Generates 2K

13 bits on-chip ROM addresses to the relative programming instruction

codes. One program page is 1024 words long.



The contents of R2 are all set to "0"s when a RESET condition occurs.



"JMP" instruction allows direct loading of the lower 10 program counter bits. Thus,

"JMP" allows PC to jump to any location within a page.



"CALL" instruction loads the lower 10 bits of the PC, and then PC+1 is pushed onto the

stack. Thus, the subroutine entry address can be located anywhere within a page.



"LJMP" instruction allows direct loading of the program counter bits (A0 ~ A10).

Therefore, "LJMP" allows PC to jump to any location within 2K (2

)



"LCALL" instruction loads the program counter bits (A0 ~ A10), and then PC+1 is

pushed onto the stack. Thus, the subroutine entry address can be located anywhere

within 2K (2

)



"RET" ("RETL k", "RETI") instruction loads the program counter with the contents of

the top of stack.



"ADD R2, A" allows a relative address to be added to the current PC, and the ninth

and above bits of the PC will increase progressively.



"MOV R2, A" allows loading of an address from the "A" register to the lower 8 bits of

the PC, and the ninth and above bits of the PC will remain unchanged.



Any instruction (except “ADD R2, A”) that is written to R2 (e.g., "MOV R2, A", "BC R2,

6",

) will cause the ninth bit and the above bits (A8 ~ A10) of the PC to remain

unchanged.



All instructions are single instruction cycle (fclk/2 or fclk/4) except for the instructions

that are written to R2.

EM78P372KSS20 Datasheet(PDF) 16 Page - ELAN Microelectronics Corp

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