EM78P372KSS20 datasheet(47/118 Pages) EMC

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EM78P372K

8-bit Microcontroller

Product Specification (V1.4) 05.11.2016

 39

(This specification is subject to change without prior notice)



All I/O port pins are configured as input mode (high-impedance state)



The Watchdog Timer and prescaler are cleared



When power is switched on, the upper three bits of R3 is cleared



The IOCB0 register bits are set to all "1"



The IOCC0 register bits are set to all "0"



The IOCD0 register bits are set to all "1"



Bits 7, 5, and 4 of the IOCE0 register are cleared



Bits 5 and 4 of the RE register are cleared



RF and IOCF0 registers are cleared

Executing the “SLEP” instruction will assert the sleep (power down) mode (When

IDLE=

“0”.). While entering into sleep mode, the Oscillator, TCC, TMR1 and TMR2 are

stopped. The WDT (if enabled) is cleared but keeps on running.

During AD conversion

, when “SLEP” instruction is set; the Oscillator, TMR1 and TMR2

keep on running. The WDT (if enabled) is cleared but keeps on running.

The controller can be awakened by:

Case 1

External reset input on /RESET pin

Case 2

WDT time-out (if enabled)

Case 3

Port 5, P70, P71 input status changes (if ICWE is enabled)

Case 4

Comparator output status changes (if CMPWE is enabled)

Case 5

AD conversion completed (if ADWE is enabled)

Case 6

Low Voltage Detector (if LVDWE is enabled)

The first two cases (1 and 2) will cause the EM78P372K to reset. The T and P flags of

R3 can be used to determine the source of the reset (wake-up). Cases 3, 4, 5 and 6 are

considered the continuation of program execution and the global interrupt ("ENI" or

"DISI" being executed) determines whether or not the controller branches to the

interrupt vector following wake-up. If ENI is executed before SLEP, the instruction will

begin to execute from Address 0x06 (Case 3), 0

0F (Case 4), 0x0C (Case 5) and 021

(Case 6) after wake-up. If DISI is executed before SLEP, the execution will restart from

the instruction next to SLEP after wake-up.

Only one of Cases 2 to 6 can be enabled before entering into sleep mode. That is:

Case [a] If WDT is enabled before SLEP, all of the RE bit is disabled. Hence, the

EM78P372K can be awakened only with Case 1 or Case 2. Refer to the

section on Interrupt (Section 6.6) for further details.

Case [b] If Port 5, P70, P71 Input Status Change is used to wake up the EM78P372K

and the ICWE bit of the RE register is enabled before SLEP, and WDT must

be disabled. Hence, the EM78P372K can be awakened only with Case 3.

Wake-up time is dependent on the oscillator mode. In RC mode, Wake-up

time is 10

s (for stable oscillators). In HXT2 (4 MHz) mode, Wake-up time is

800

s (for stable oscillators), and in LXT2 mode, Wake-up time is 2 ~ 3s.

EM78P372KSS20 Datasheet(PDF) 47 Page - ELAN Microelectronics Corp

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