MPF5023AMMA0ES datasheet(45/91 Pages) NXP

45 / 91 page

NXP Semiconductors

PF5023

Power management integrated circuit (PMIC) for high performance applications

PF5023

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Product data sheet

Rev. 1 — 15 April 2020

45 / 91

Bit

Description

CTRL1

WDI_MODE

Writing a 0 set the WDI event to soft WD reset

Writing a 1 set the WDI event to hard WD reset

CTRL1

VIN_OVLO_SDWN

Writing a 0 disables a shutdown event upon a VIN

overvoltage condition (only interrupts are provided)

CTRL1

WD_EN

Writing a 0 disables the watchdog counter block

CTRL1

WD_STBY_EN

Writing a 0 disables the watchdog counter during the

standby mode

CTRL1

WDI_STBY_ACTIVE

Writing a 0 disables the monitoring of WDI input

during standby mode

CTRL1

I2C_SECURE_EN

Writing a 0 disables de I2C secure write mode

VMONENx

SWxVMON_EN

Writing a 0 disables the OV/UV monitor for SWx

15 Functional blocks

15.1 Analog core and internal voltage references

All regulators use the main bandgap as the reference for the output voltage generations,

this bandgap is also used as reference for the internal analog core and digital core

supplies. The performance of the regulators is directly dependent on the performance of

the bandgap.

No external DC loading is allowed on V1P5A and V1P5D. V1P5D is kept powered

as long as there is a valid supply and it may be used as a reference voltage for the

VDDOTP and TBBEN pins during system power on.

The analog reference supply V1P5A is used as the internal reference supply for the

voltage regulators. it is disabled in the LP_OFF state to achieve low quiescent currents.

In applications where there is two or more PMICs supplying a system, the V1P5A

may be used to pull up the XFAILB pin to achieve proper power up and power down

synchronization during system operation.

A second bandgap is provided as the reference for all the monitoring circuits. This

architecture allows the PF5023 to provide a reliable way to detect not only single point

but also latent faults in order to meet the metrics required by an ASIL B level application.

Table 35. Internal supplies electrical characteristics

Symbol

Parameter

Min

Typ

Max

Unit

V1P5D

V1P5D output voltage

1.50

1.60

1.65

C1P5D

V1P5D output capacitor

—

1.0

—

µF

V1P5A

V1P5A output voltage

1.50

1.60

1.65

C1P5A

V1P5A output capacitor

—

1.0

—

µF

15.2 Type 1 buck regulators (SWx)

The PF5023 features four low voltage regulators with input supply range from 2.5 V

to 5.5 V and output voltage range from 0.4 V to 1.8 V in 6.25 mV steps. Each voltage

regulator is capable to supply 2.5 A and features a programmable soft-start and DVS

ramp for system power optimization.

MPF5023AMMA0ES Datasheet(PDF) 45 Page - NXP Semiconductors

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