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ZAMC4100GA2R Datasheet(PDF) 125 Page - Renesas Technology Corp

Part # ZAMC4100GA2R
Description  Actuator and Motor Controller
PDF  156 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ZAMC4100GA2R Datasheet(HTML) 125 Page - Renesas Technology Corp

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ZAMC4100 Datasheet
© 2016 Integrated Device Technology, Inc.
125
January 26, 2016
SYS_RSTSTAT
ADD: 0x4000_000C
Bit
NAME
Ext.
Access
Int.
Access
Reset
Value
Description
7
ENLOCKUP
R
R
0
This bit reflects whether a lockup from the ARM® core is
allowed to reset the system (set to 1) or not (set to 0).
7 : 0
SETENLOCKUP
W
---
0
To enable the lockup reset, 0xC9 must be written to bits 7:0.
It can be disabled by writing another value. This bit is reset by
all four reset sources (extRst, sysRstReq, lockupRst,
jtagRst).
15:8
---
R
---
0
Unused; always read as 0.
23 : 16
JTAGRSTREQ
W
R
0
To generate a reset via the JTAG interface, 0x3A must be
written to bits 23:16. These bits cannot be written by the
ARM® core.
31 : 24
---
R
---
0
Unused; always read as 0.
4.10.2.
GPIO Registers
The GPIO registers are mapped into the system address space between 0x4000_1400 and 0x4000_17FF.
Unused addresses must not be accessed.
Table 4.9
Register [0x4000_1400] GPIO_DIR
GPIO_DIR
ADD: 0x4000_1400
Bit
Name
Ext.
Access
Int.
Access
Reset
Value
Description
7 : 0
GPIODIR
R / W
R
0
1: GPIO pin is switched as output direction.
0: GPIO pin is switched as input direction.
15 : 8
---
N/A
N/A
0
Reserved.
31 : 16
---
R
---
0
Unused; always read as 0.
Table 4.10 Register [0x4000_1404] GPIO_IN
GPIO_IN
ADD:0x4000_1404
Bit
Name
Ext.
Access
Int.
Access
Reset
Value
Description
7 : 0
GPIOIN
R
R / W
0
Synchronized input value.
15 : 8
---
N/A
N/A
0
Reserved.
31 : 8
---
R
---
0
Unused; always read as 0.



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