ZAMC4100GA2R datasheet(121/156 Pages) RENESAS

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ZAMC4100 Datasheet

121

January 26, 2016

In a successful transmission, the transmitter first sends a 1 (STOP bit is placed at the beginning so that software

does not have to take care about the length of the previously received STOP bit), then sends a 0 (START bit) and

then the data byte is appended. At the end of the data byte transmission, the bus is released. If further data is

present, the transmitter remains active and continues transmission. If the TX buffer is empty, the transmitter is de-

activated (TXACTIVE is set to 0 in Z1_LINCFG).

Because several slaves might attempt to send data on the bus, it is possible that a conflict could occur on the bus

(first error condition). This can only be detected when the module sends a 1 (recessive value) but receives a 0

(dominant value). There are three checks implemented for this:

•

The receiver is already activated when the transmitter will be started

•

A falling edge is detected on the bus while sending the STOP bit at the beginning

•

A 0 is received during the data byte while transmitting a 1

In all three cases, the transmitter is stopped (TXACTIVE bit is set to 0 in Z1_LINCFG) and the TX buffer is cleared

(TXEMPTY bit is set in LINSTAT) to prevent invalid data from remaining in the buffer. The CONFLICT flag in the

LINSTAT register is also set.

There is a second error condition that might occur. For some error conditions (see section 3.13), the LIN PHY can

protect the bus by disabling the transmitter. This can be detected when sending a 0 but receiving a 1. This

condition is checked at the end of each transmitted bit. When this error condition is detected, the transmitter is

stopped (TXACTIVE bit is set to 0 in LINSTAT) and the TX buffer is cleared (TXEMPTY is set in LINSTAT) to

prevent invalid data remaining in the buffer. Additionally the TXOFF flag bit in the LINSTAT register is set.

It is also possible that the master generates a BREAK and SYNC field while the SW-LIN is transmitting and that

no bus conflict occurs. Therefore the transmitter is also de-activated when a sync strobe is detected.

Figure 4.11 Waveforms of the TX and RX Control and Status Signals

RXENABLE_R

RXD_I

RXACTIVE_R

TXEMPTY_R

TXACTIVE_R

TXD_O

CLEARED BY DATA

PRESENT IN TX BUFFER

SET BY DATA PRESENT

IN TX BUFFER

CLEARED BY NO DATA

PRESENT IN TX BUFFER

END OF STOP BIT FROM RECEIVED PID

TX-START

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