ZAMC4100GA2R datasheet(139/156 Pages) RENESAS

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ZAMC4100 Datasheet

139

January 26, 2016

Table 4.37 Register [0x4000_0818] FC_STAT_PROG

FC_STAT_PROG

ADD:0x4000_0818

Bit

Name

Ext.

Access

Int.

Access

Reset

Value

Description

17 : 0

ADDRPROG

R / W

This register contains the address of the instruction fetch

error that caused the first of the three flags below to be set;

the highest bit is used to distinguish between MAIN (0) and

INFO (1) area.

28 : 18

---

Unused; always read as 0.

PROGALL1

R / W

This bit is set when an instruction fetch occurs to an erased

memory address; it is cleared when this register is read.

PROG1ERR

R / W

This bit is set when a correctable error occurs during an

instruction fetch; it is cleared when this register is read.

PROG2ERR

R / W

This bit is set when an un-correctable error occurs during an

instruction fetch; it is cleared when this register is read.

Table 4.38

FC_STAT_DATA

ADD:0x4000_081C

Bit

Name

Ext.

Access

Int.

Access

Reset

Value

Description

17 : 0

ADDRDATA

R / W

This register contains the address of the read error which

caused the first of the three flags below to be set; the highest

bit is used to distinguish between MAIN (0) and INFO (1)

area.

28 : 18

---

Unused; always read as 0.

DATAALL1

R / W

This bit is set when a READ is performed to an erased

memory address; it is cleared when this register is read.

DATA1ERR

R / W

This bit is set when a correctable error occurs during a read;

it is cleared when this register is read.

DATA2ERR

R / W

This bit is set when an un-correctable error occurs during a

READ; it is cleared when this register is read.

ZAMC4100GA2R Datasheet(PDF) 139 Page - Renesas Technology Corp

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