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SLG46867MTR Datasheet(PDF) 72 Page - Renesas Technology Corp |
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SLG46867MTR Datasheet(HTML) 72 Page - Renesas Technology Corp |
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72 / 209 page ![]() Datasheet 28-Feb-2023 CFR0011-120-00 Revision 3.21 Page 72 of 208 © 2023 Renesas Electronics Corporation SLG46867 GreenPAK Programmable Mixed-Signal Matrix with Dual 44 m Ω/2 A P-FET Figure 39: 8-bit Multi-Function Macrocells Block Diagram (3-bit LUT12/DFF16, CNT/DLY4) CNT/DLY4 OUT ext_CLK DLY_IN/CNT Reset 3-bit LUT12 OUT IN0 IN1 8-bits NVM IN2 registers [1263:1256] From Connection Matrix Output [37] To Connection Matrix Input [22] LUT Truth Table CNT Data S0 S1 Config Data registers [1120:1112], registers [1106:1103] CLK D Q/nQ DFF Registers From Connection Matrix Output [36] S0 S1 From Connection Matrix Output [35] S0 S1 S0 S1 S0 S1 S2 S3 registers [1271:1264] nRST/nSET To Connection Matrix Input [23] S0 S1 S0 S1 S0 S1 0 S0 S1 S2 S3 0 LUT/DFF Sel registers [1108:1111] register [1107] Mode Sel register [1263] DFF or Latch Select register [1262] Output Select (Q or nQ) register [1261] (nRST or nSET) from matrix Output register [1260] DFF Initial Polarity Select DFF/ Latch16 |
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