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SLG46867MTR Datasheet(PDF) 95 Page - Renesas Technology Corp |
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SLG46867MTR Datasheet(HTML) 95 Page - Renesas Technology Corp |
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95 / 209 page  Datasheet 28-Feb-2023 CFR0011-120-00 Revision 3.21 Page 95 of 208 © 2023 Renesas Electronics Corporation SLG46867 GreenPAK Programmable Mixed-Signal Matrix with Dual 44 m Ω/2 A P-FET 9.2 ACMP1H BLOCK DIAGRAM Figure 63: ACMP1H Block Diagram 111111 111110- 000000 Internal VREF 00 01 10 GPIO5: ACMP1H(+) ACMP0H IN+ MUX Output Selectable Gain reg <705:704> to ACMP2L’s MUX input VREF + - From Connection Matrix Output <76> pdb Hysteresis Selection reg <660:659> reg <711:706> *GPIO5_aio_en; reg <661>; reg <657> High Speed ACMP To Connection Matrix Input<57> ACMP Ready Latch 0 1 reg <688> W/S Control Ext. VREF0 (GPIO2) LPF* Note*: 2nd order low pass filter with typical bandwidth 8 kHz |
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