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SLG46867MTR Datasheet(PDF) 75 Page - Renesas Technology Corp |
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SLG46867MTR Datasheet(HTML) 75 Page - Renesas Technology Corp |
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75 / 209 page ![]() Datasheet 28-Feb-2023 CFR0011-120-00 Revision 3.21 Page 75 of 208 © 2023 Renesas Electronics Corporation SLG46867 GreenPAK Programmable Mixed-Signal Matrix with Dual 44 m Ω/2 A P-FET As shown in Figures 24-30 there is a possibility to use LUT/DFF and CNT/DLY simultaneously. Note: It is not possible to use LUT and DFF at once, one of these macrocells must be selected. Case 1. LUT/DFF in front of CNT/DLY. Three input signals from the connection matrix go to previously selected LUT or DFF's inputs and produce a single output which goes to a CND/DLY input. In its turn Counter/Delay's output goes back to the matrix. Case 2. CNT/DLY in front of LUT/DFF. Two input signals from the connection matrix go to CND/DLY's inputs (in and CLK). Its output signal can be connected to any input of previously selected LUT or DFF, after which the signal goes back to the matrix. Case 3. Single LUT/DFF or CNT/DLY. Also, it is possible to use a standalone LUT/DFF or CNT/DLY. In this case, all inputs and output of the macrocell are connected to the matrix. Figure 42: 8-bit Multi-Function Macrocells Block Diagram (3-bit LUT15/DFF19, CNT/DLY7) CNT/DLY7 OUT ext_CLK DLY_IN/CNT Reset 3-bit LUT15 OUT IN0 IN1 8-bits NVM IN2 registers [1311:1304] From Connection Matrix Output [46] To Connection Matrix Input [28] LUT Truth Table CNT Data S0 S1 Config Data registers [1174:1166], registers [1160:1157] CLK D Q/nQ DFF Registers From Connection Matrix Output [45] S0 S1 From Connection Matrix Output [44] S0 S1 S0 S1 S0 S1 S2 S3 registers [1319:1312] nRST/nSET To Connection Matrix Input [29] S0 S1 S0 S1 S0 S1 0 S0 S1 S2 S3 0 LUT/DFF Sel registers [1165:1162] register [1161] Mode Sel register [1311] DFF or Latch Select register [1310] Output Select (Q or nQ) register [1309] (nRST or nSET) from matrix Output register [1308] DFF Initial Polarity Select DFF/ Latch19 |
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