VSC8541XMV-05 datasheet(41/101 Pages) MICROCHIP

41 / 101 page

Registers

VMDS-10513 VSC8541-02 Datasheet Revision 4.1

4.2.2

Mode Status

The register at address 1 in the device main registers space enables reading the currently enabled mode

setting. The following table shows possible readouts of this register.

4.2.3

Device Identification

All 16 bits in both register 2 and register 3 in the VSC8541-02 device are used to provide information

associated with aspects of the device identification. The following tables list the expected readouts.

Before selecting the 1000 Mbps forced speed mode, manually configure the PHY as master or slave by setting bit 11 in register

9 (1000BASE-T Control) and MDI or MDIX by setting bits 3:2 in register 19E1 (Extended Mode Control).

Table 22 •

Mode Status, Address 1 (0x01)

Bit Name

Access Description

Default

100BASE-T4 capability

1: 100BASE-T4 capable.

100BASE-TX FDX capability RO

1: 100BASE-TX FDX capable.

100BASE-TX HDX capability RO

1: 100BASE-TX HDX capable.

10BASE-T FDX capability

1: 10BASE-T FDX capable.

10BASE-T HDX capability

1: 10BASE-T HDX capable.

100BASE-T2 FDX capability RO

1: 100BASE-T2 FDX capable.

100BASE-T2 HDX capability RO

1: 100BASE-T2 HDX capable.

Extended status enable

1: Extended status information present in register 15. 1

Reserved

Reserved.

Preamble suppression

capability

1: MF preamble can be suppressed.

0: MF required.

Autonegotiation complete

1: Auto-negotiation complete.

Remote fault

Latches high.

1: Far-end fault detected.

Autonegotiation capability

1: Auto-negotiation capable.

Link status

Latches low.

1: Link is up.

Jabber detect

Latches high.

1: Jabber condition detected.

Extended capability

1: Extended register capable.

Table 23 •

Identifier 1, Address 2 (0x02)

Bit

Name

Access Description

Default

15:0 Organizationally unique identifier (OUI) RO

OUI most significant bits (3:18)

0×0007

Table 24 •

Identifier 2, Address 3 (0x03)

Bit

Name

Access Description

Default

15:10 OUI

OUI least significant bits (19:24)

000001

9:4

Microsemi model number

VSC8541-02

110111

3:0

Device revision number

Revision C

0010

VSC8541XMV-05 Datasheet(PDF) 41 Page - Microchip Technology

VSC8541XMV-05 Datasheet(HTML) 41 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL