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VSC8541XMV-05 Datasheet(PDF) 17 Page - Microchip Technology |
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VSC8541XMV-05 Datasheet(HTML) 17 Page - Microchip Technology |
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17 / 101 page ![]() Functional Descriptions VMDS-10513 VSC8541-02 Datasheet Revision 4.1 8 In order to further reduce power consumption and EMI, the user may elect to choose a slower edge rate than recommended if the end application supports it. The MAC interface signal rise/fall times can be changed by writing to register bits 27E2.7:5. The typical change in edge rate for each setting at various VDDMAC voltages is shown in the following table. These values are based on measurements performed on typical silicon at nominal supply and room temperature settings. 3.3 Hardware Mode Strapping and PHY Addressing The VSC8541-02 device provides hardware-configured modes of operation that are achieved by sampling output pins on the rising edge of reset and externally pulling the pin to a logic HIGH or LOW (based on the desired configuration). These output pins are required by the device as inputs while NRESET is asserted and the logic state of the pin is latched in the device upon de-assertion of NRESET. To ensure correct operation of the hardware strapping function, any other device connected to these pins must not actively drive a signal onto them. The following table describes the pins used for this purpose and their respective modes. 2.5 V 100 1.8 V 111 1.5 V 111 Table 5 • MAC Interface Edge Rate Control Register Setting Edge Rate Change (VDDMAC) 3.3V 2.5V 1.8V 1.5V 111 (fastest) Default Default Default (recommended) Default (recommended) 110 –2% –3% –5% –6% 101 –4% –6% –9% –14% 100 –7% (recommended) –10% (recommended) –16% –21% 011 –10% –14% –23% –29% 010 –17% –23% –35% –42% 001 –29% –37% –52% –58% 000 (slowest) –53% –63% –76% –77% Table 6 • Hardware Mode Strapping and PHY Addressing Pin(s) Operation Mode CLKOUT Enable/disable CLKOUT signal RX_CLK Managed or unmanaged mode RXD0 Signal A RXD1 Signal B RXD2 Signal C RXD3 Signal D Table 4 • Recommended Edge Rate Settings (continued) VDDMAC Voltage Edge Rate Setting |
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