Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

AD4080BBCZ Datasheet(PDF) 75 Page - Analog Devices

Part # AD4080BBCZ
Description  20-Bit, 40 MSPS, Differential SAR ADC
PDF  95 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD4080BBCZ Datasheet(HTML) 75 Page - Analog Devices

Back Button AD4080BBCZ Datasheet HTML 71Page - Analog Devices AD4080BBCZ Datasheet HTML 72Page - Analog Devices AD4080BBCZ Datasheet HTML 73Page - Analog Devices AD4080BBCZ Datasheet HTML 74Page - Analog Devices AD4080BBCZ Datasheet HTML 75Page - Analog Devices AD4080BBCZ Datasheet HTML 76Page - Analog Devices AD4080BBCZ Datasheet HTML 77Page - Analog Devices AD4080BBCZ Datasheet HTML 78Page - Analog Devices AD4080BBCZ Datasheet HTML 79Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 75 / 95 page
background image
Data Sheet
AD4080
CONFIGURATION REGISTERS
analog.com
Rev. 0 | 75 of 95
REGISTER DETAILS
Interface Configuration A Register
Address: 0x00, Reset: 0x10, Name: INTERFACE_CONFIG_A
Figure 108. Interface Configuration A Settings
Table 32. Bit Descriptions for INTERFACE_CONFIG_A
Bits
Bit Name
Description
Reset
Access
7
SW_RESET
First of the Two SW_RESET Bits. This bit appears in two locations in this register. Both locations must
be written to at the same time to trigger a software reset of the device. This action returns any previously
configured registers to their default settings, except for the ADDR_ASCENSION bit from the Interface
Configuration A Register, which keeps its previous value.
0x0
R/W
Only use this reset method once the ADC is in an idle state, where conversions are not being clocked, and
any existing conversions are completed.
6
RESERVED
Reserved. Write 0 to this bit.
0x0
R
5
ADDR_ASCENSION
Determines Sequential Addressing Behavior.
0x0
R/W
0: Address is decremented by one when streaming.
1: Address is Incremented by one when streaming.
4
SDO_ENABLE
SDO Pin Enable.
0x1
R
[3:1]
RESERVED
Reserved. Write 000 to these bits.
0x0
R
0
SW_RESETX
Second of the Two SW_RESET Bits. This bit appears in two locations in this register. Both locations must
be written to at the same time to trigger a software reset of the device. This action returns any previously
configured registers to their default settings, except for the ADDR_ASCENSION bitd from the Interface
Configuration A Register, which keeps its previous value.
0x0
R/W
Only use this reset method once the ADC is in an idle state, where conversions are not being clocked, and
any existing conversion are completed.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com