AD4080BBCZ datasheet(94/95 Pages) AD

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Data Sheet

AD4080

CONFIGURATION REGISTERS

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Filter Configuration Register

Address: 0x29, Reset: 0x00, Name: FILTER_CONFIG

Figure 138. Filter Configuration Register

Table 62. Bit Descriptions for FILTER_CONFIG

Bits

Bit Name

Description

Reset

Access

RESERVED

Reserved. Write 0b0 to this bit field.

0x0

[6:3]

SINC_DEC_RATE

Decimation Factor. These bits set the Sinc Decimation Factor N. The filter compensation block incurs an

additional 2× decimation. The total decimation for a selected filter is sinc1 = N, sinc5 = N, or sinc5 +

compensation = N × 2.

0x0

R/W

For a selected filter, setting invalid values, outside of those specified here, will set the filter at the maximum

decimation rate

0000: N = 2.

0001: N = 4.

0010: N = 8.

0011: N = 16.

0100: N = 32.

0101: N = 64.

0110: N = 128.

0111: N = 256.

1000: N = 512 (sinc1 only).

1001: N = 1024 (sinc1 only).

RESERVED

Reserved.

0x0

[1:0]

FILTER_SEL

Filter Selection. To ensure the first filter result produces the correct data, when a user makes a change to the

filter selection, a reset must be issued via the GPIO pin configured for filter synchronization (FILTER_SYNC).

0x0

R/W

00: Filter Disabled.

01: Sinc1 Filter Selected.

10: Sinc5 Filter Selected.

11: Sinc5 + Compensation Filter Selected.

AD4080BBCZ Datasheet(PDF) 94 Page - Analog Devices

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