MC68HC908GR4MP datasheet(128/286 Pages) FREESCALE

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Low-Voltage Inhibit (LVI)

MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

128

Freescale Semiconductor

LVISTOP, LVIPWRD, LVI5OR3, and LVIRSTD are in the configuration register (CONFIG). See Chapter

8 Configuration Register (CONFIG) for details of the LVI’s configuration bits. Once an LVI reset occurs,

the MCU remains in reset until VDD rises above a voltage, VTRIPR, which causes the MCU to exit reset.

See 19.3.2.5 Low-Voltage Inhibit (LVI) Reset for details of the interaction between the SIM and the LVI.

The output of the comparator controls the state of the LVIOUT flag in the LVI status register (LVISR).

An LVI reset also drives the RST pin low to provide low-voltage protection to external peripheral devices.

Figure 14-1. LVI Module Block Diagram

14.3.1 Polled LVI Operation

In applications that can operate at VDD levels below the VTRIPF level, software can monitor VDD by polling

the LVIOUT bit. In the configuration register, the LVIPWRD bit must be 0 to enable the LVI module, and

the LVIRSTD bit must be 1 to disable LVI resets.

14.3.2 Forced Reset Operation

In applications that require VDD to remain above the VTRIPF level, enabling LVI resets allows the LVI

module to reset the MCU when VDD falls below the VTRIPF level. In the configuration register, the

LVIPWRD and LVIRSTD bits must be cleared to enable the LVI module and to enable LVI resets.

14.3.3 Voltage Hysteresis Protection

Once the LVI has triggered (by having VDD fall below VTRIPF), the LVI will maintain a reset condition until

VDD rises above the rising trip point voltage, VTRIPR. This prevents a condition in which the MCU is

continually entering and exiting reset if VDD is approximately equal to VTRIPF. VTRIPR is greater than

VTRIPF by the hysteresis voltage, VHYS.

Addr.

Bit 7

654321

Bit 0

$FE0C

LVI Status Register

(LVISR)

Read:

LVIOUT

0000000

Write:

Reset:

00000000

= Unimplemented

Figure 14-2. LVI I/O Register Summary

LOW VDD

DETECTOR

LVIPWRD

STOP INSTRUCTION

LVISTOP

LVI RESET

LVIOUT

VDD > LVITrip = 0

VDD ≤ LVITrip = 1

FROM CONFIG

VDD

FROM CONFIG

LVIRSTD

LVI5OR3

FROM CONFIG

MC68HC908GR4MP Datasheet(PDF) 128 Page - Freescale Semiconductor, Inc

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