MC68HC908GR4MP datasheet(174/286 Pages) FREESCALE

174 / 286 page

Serial Communications Interface (SCI)

MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

174

Freescale Semiconductor

18.5 Low-Power Modes

The WAIT and STOP instructions put the MCU in low power-consumption standby modes.

18.5.1 Wait Mode

The SCI module remains active after the execution of a WAIT instruction. Any enabled CPU interrupt

request from the SCI module can bring the MCU out of wait mode.

If SCI module functions are not required during wait mode, reduce power consumption by disabling the

module before executing the WAIT instruction.

Refer to Chapter 3 Low-Power Modes for information on exiting wait mode.

18.5.2 Stop Mode

The SCI module is inactive in stop mode. The STOP instruction does not affect SCI register states. SCI

module operation resumes when the MCU exits stop mode.

Because the internal clock is inactive during stop mode, entering stop mode during an SCI transmission

or reception results in invalid data.

Refer to Chapter 3 Low-Power Modes for information on exiting stop mode.

18.6 SCI During Break Module Interrupts

The system integration module (SIM) controls whether status bits in other modules can be cleared during

the break state. The BCFE bit in the SIM break flag control register (SBFCR) enables software to clear

status bits during the break state.

To allow software to clear status bits during a break interrupt, write a 1 to the BCFE bit. If a status bit is

cleared during the break state, it remains cleared when the MCU exits the break state.

To protect status bits during the break state, write a 0 to the BCFE bit. With BCFE at 0 (its default state),

software can read and write I/O registers during the break state without affecting status bits. Some status

bits have a 2-step read/write clearing procedure. If software does the first step on such a bit before the

break, the bit cannot change during the break state as long as BCFE is at 0. After the break, doing the

second step clears the status bit.

18.7 I/O Signals

Port E shares two of its pins with the SCI module. The two SCI I/O pins are:

•

PE2/TxD — Transmit data

•

PE1/RxD — Receive data

18.7.1 PE2/TxD (Transmit Data)

The PE2/TxD pin is the serial data output from the SCI transmitter. The SCI shares the PE2/TxD pin with

port E. When the SCI is enabled, the PE2/TxD pin is an output regardless of the state of the DDRE0 bit

in data direction register E (DDRE).

MC68HC908GR4MP Datasheet(PDF) 174 Page - Freescale Semiconductor, Inc