P89V52X2FN datasheet(36/56 Pages) PHILIPS

36 / 56 page

P89V52X2_1

Preliminary data sheet

Rev. 01 — 7 June 2007

36 of 56

NXP Semiconductors

P89V52X2

80C51 with 256 B RAM, 192 B data EEPROM

Writing either the PROG or EP command to FMCON will start the program or

erase-program process and place the CPU in a program-idle state. The CPU will remain

in this idle state until the program or erase-program cycle is completed. Interrupts will

NOT be serviced until the cycle is completed.

Erase-program or programming of a single byte (or multiple bytes) in the data EEPROM

array is accomplished using the following steps:

• Write the LOAD command (00H) to FMCON. The LOAD command will clear all

locations in the page register and their corresponding update flags.

• Write the address within the page register to FMADRL. Since the loading the page

FMADRH and FMADRL[7:6], the user can write the byte location within the page

FMADRL[7:6]) at this time.

• Write the data to be programmed to FMDATA. This will increment FMADRL pointing to

the next byte in the page register.

• Write the address of the next byte to be programmed to FMADRL, if desired. (This is

not needed for contiguous bytes since FMADRL is auto-incremented). All bytes to be

programmed must be within the same page.

• Write the data for the next byte to be programmed to FMDATA.

• Repeat writing of FMADRL and/or FMDATA until all desired bytes have been loaded

into the page register.

• Write the page address mapped into user code memory to FMADRH and

FMADRL[7:6], if not previously included when writing the page register address to

FMADRL[5:0].

• Write the EP (68H) or PROG (48H) command to FMCON, starting the erase-program

or program cycle.

• Read FMCON to check status. If aborted, repeat starting with the LOAD command.

Table 33.

Flash Memory Control register (FMCON - address E4H) bit allocation

Bit

Symbol (R)

BUSY

DAP

ERR

Symbol (W) FMCMD.7

FMCMD.6

FMCMD.5

FMCMD.4

FMCMD.3

FMCMD.2

FMCMD.1

FMCMD.0

Reset

00000

000

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