P89V52X2FN datasheet(28/56 Pages) PHILIPS

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P89V52X2_1

Preliminary data sheet

Rev. 01 — 7 June 2007

28 of 56

NXP Semiconductors

P89V52X2

80C51 with 256 B RAM, 192 B data EEPROM

The signal to load SBUF and RB8, and to set RI, will be generated if, and only if, the

following conditions are met at the time the final shift pulse is generated: (a) RI = 0, and

(b) Either SM2 = 0, or the received 9th data bit = 1.

If either of these conditions is not met, the received frame is irretrievably lost, and RI is not

set. If both conditions are met, the received 9th data bit goes into RB8, and the first 8 data

bits go into SBUF.

6.10.8 Multiprocessor communications

UART modes 2 and 3 have a special provision for multiprocessor communications. In

these modes, 9 data bits are received or transmitted. When data is received, the 9th bit is

stored in RB8. The UART can be programmed so that when the stop bit is received, the

serial port interrupt will be activated only if RB8 = 1. This feature is enabled by setting bit

SM2 in SCON. One way to use this feature in multiprocessor systems is as follows:

When the master processor wants to transmit a block of data to one of several slaves, it

first sends out an address byte which identifies the target slave. An address byte differs

from a data byte in a way that the 9th bit is ‘1’ in an address byte and ‘0’ in the data byte.

With SM2 = 1, no slave will be interrupted by a data byte, i.e. the received 9th bit is ‘0’.

However, an address byte having the 9th bit set to ‘1’ will interrupt all slaves, so that each

slave can examine the received byte and see if it is being addressed or not. The

addressed slave will clear its SM2 bit and prepare to receive the data (still 9 bits long) that

follow. The slaves that weren’t being addressed leave their SM2 bits set and go on about

their business, ignoring the subsequent data bytes.

SM2 has no effect in Mode 0, and in Mode 1 can be used to check the validity of the stop

bit, although this is better done with the Framing Error flag. When UART receives data in

mode 1 and SM2 = 1, the receive interrupt will not be activated unless a valid stop bit is

received.

6.10.9 Automatic address recognition

Automatic Address Recognition is a feature which allows the UART to recognize certain

addresses in the serial bit stream by using hardware to make the comparisons. This

feature saves a great deal of software overhead by eliminating the need for the software

to examine every serial address which passes by the serial port. This feature is enabled

for the UART by setting the SM2 bit in SCON. In the 9 bit UART modes, mode 2 and mode

3, the Receive Interrupt flag (RI) will be automatically set when the received byte contains

either the ‘Given’ address or the ‘Broadcast' address. The 9 bit mode requires that the 9th

information bit is a ‘1’ to indicate that the received information is an address and not data.

Using the Automatic Address Recognition feature allows a master to selectively

communicate with one or more slaves by invoking the Given slave address or addresses.

All of the slaves may be contacted by using the Broadcast address. Two Special Function

Registers are used to define the slave’s address, SADDR, and the address mask,

SADEN. SADEN is used to define which bits in the SADDR are to be used and which bits

are ‘don’t care’. The SADEN mask can be logically ANDed with the SADDR to create the

‘Given’ address which the master will use for addressing each of the slaves. Use of the

Given address allows multiple slaves to be recognized while excluding others.

This device uses the methods presented in Figure 18 to determine if a ‘Given’ or

‘Broadcast’ address has been received or not.

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