LM5177DCPR datasheet(20/60 Pages) TI2

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7.3.2.2 Buck Mode

In buck mode operation, the converter starts a buck magnetization cycle (state II) with the internal clock signal.

When the inductor reaches its peak current, the converter proceeds to the buck demagnetization state III. With

the next clock signal, the converter changes back to a buck magnetization cycle and starts a new switching

cycle with sampling the peak current. As long as the duty cycle does not reach the minimum off time, the current

control remains in buck operating mode.

IL(peak)

III

Main Oscil lato r

Clock

Switchi ng

State

Inducto r

Curren t

Figure 7-3. Inductor Current in Continuous Current Buck Operation

7.3.2.3 Buck-Boost Mode

As soon as the on time in boost mode operation is lower then the minimum on time or the off time in buck mode

is lower then the minimum off time, the control transits into the buck-boost operation. In the continuous current

buck-boost mode, the control adds a boost magnetization (state I) switching cycle before the peak current is

reached. Therefore, buck-boost operation mode always consists of all three switching cycles state I, state II, and

state III. The peak current detection in this mode happens at the end of switching state I.

IL(peak)

III

Main Oscil lato r

Clock

Switchi ng

State

Inducto r

Curren t

Figure 7-4. Inductor Current in Continuous Buck-Boost Operation

7.3.3 Power Save Mode

With the MODE pin low, power save mode is active. In this operating mode, the switching activity is reduced

and efficiency is maximized. If the mode pin is high, power save mode is disabled. The converter operates in

continuous conduction mode.

In boost or in buck mode, the converter is operating up to the duty cycles with the respective minimum off times

or on times. If the timing limits are reached, and the current is below the selected PSM entry threshold, the

output voltage increases. As soon as this happens, the voltage regulation loop detects the increase and turns

the device into a TI proprietary sleep mode as the energy consumed by the load is less than what the converter

generates during switching. In this mode, both low sides are turned on to ensure the high-side gate voltage

supply voltage for HB1 and HB2 are charged. Other internal circuits are partially turned off to reduce the current

consumption of the converter to a minimum possible. In case the output voltage reaches the nominal output

voltage set point, the switching activity starts again.

To avoid subharmonic frequencies due to repetitive entry and exit of the power save operation, the entry point is

randomized between the nominal voltage and the maximum entry detection threshold of 1% above the nominal

voltage.

LM5177

SNVSBU4F – JUNE 2022 – REVISED JANUARY 2025

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