LM5177DCPR datasheet(33/60 Pages) TI2

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7.3.18 Gate Driver

The LM5177 features four internal logic-level nMOS gate drivers. The drivers maintain the high frequency

switching of both half bridges needed for a buck-boost operation. If the device is in boost or buck mode, the

other half bridge high-side switch needs to be permanent on. The internal gate drivers support this by sharing

the current from the other half bridge, which is switching. Therefore, a minimum of quiescent current can be

assured as no additional char pump is needed. Due to the high drive current, it can support a wide range of

external power FETs as well as a parallel operation of them.

The LO and HO outputs are protected with a shoot-through protection, which ensures that both outputs are not

turned on at the same time. If the PWM modulation logic of the buck-boost turns the LOx pin off, the HOx pin is

not turned on until the following are all true (AND not OR) true:

1. A minimum internal transition time (tt(dead)) is reached.

2. The voltage on the LOx pin drops below the detection threshold VTH(GATEOUT).

This behavior is maintained and vice versa if the HOx pin turns off first.

The high-side supply voltage for the gate driver are monitored by an additional bootstrap UVLO comparator. This

comparator monitors the differential voltage between SWx and HBx. If the voltage drops below the threshold the

buck-boost converter operation turns off. The device restarts automatically once the positive going threshold is

reached with the soft-start scheme.

Additionally, the LM5177 monitors the upper voltage between SWx and HBx. If this voltage exceeds the

threshold voltage of the clamping circuit, it activates a internal current source to pull the voltage down.

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LM5177

SNVSBU4F – JUNE 2022 – REVISED JANUARY 2025

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LM5177DCPR Datasheet(PDF) 33 Page - Texas Instruments