LM5177DCPR datasheet(25/60 Pages) TI2

25 / 60 page

fpole,boost= 12π× 2×Io,max

VVOUT ×Co

(10)

Due to the precise implementation of the error amplifier, the voltage on the LM5177 COMP pin is accurately

reflecting the nominal peak current value of the inductor. Figure 7-13 shows the control V/I-characteristics of the

error amplifier in FPWM mode. Use this as a guidance for applicative designs where you need to manipulate the

inner current loop regulation.

Positive

Curren t Limit

V(COMP)

0mV

V(CSA)-V(CSB)

Negative

Curren t Limit

V(COMP,CL+)

V(COMP,CL-)

V(COMP,CL0)

Figure 7-13. Control Function for the Peak Current Sense Voltage Versus VCOMP

7.3.9 Output Voltage Tracking

There are two kinds of output voltage tracking features integrated in the device.

• Analog voltage tracking function through the SS/ATRK pin

• Digital voltage tracking function through the DTRK pin

Analog Voltage Tracking

For the analog output voltage tracking, an external applied voltage overwrites the reference voltage for the

output regulation loop. Although it is possible, it is not recommended to apply this voltage before the soft start is

finished because the soft-start ramp time and, therefore, the input current during the start-up is changed.

As the internal error amplifier is designed to use the lowest reference input voltage, the applied voltage on the

SS/ATRK pin is only effective for voltages lower than the Vref of the feedback pin. Hence, the maximum voltage

for the output is determined by the resistor network on the FB pin.

If the analog voltage tracking is used to start-up the converter voltage a change at the MODE pin from high to

low or low to high will indicate the logic that the soft-start is completed.

Digital Voltage Tracking

The DTRK input of the LM5177 directly modulates the internal reference voltage. This function activates if the

voltage on the DTRK pin is higher than the rising threshold of VT(DTRK) and a PWM signal in the recommended

frequency is applied to the pin.

The maximum output voltage during digital tracking cannot exceed the nominal reference voltage for the FB

resistor divider. The applied PWM signal reduces the internal reference voltage in relation with the duty cycle on

the DTRK pin. A small duty cycle means less output voltage and a high duty cycle of the PWM input represents

a high output voltage. For example, a duty cycle of 30% causes a output voltage of 30% of the selected voltage

by the FB divider resistors.

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LM5177

SNVSBU4F – JUNE 2022 – REVISED JANUARY 2025

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