R5F526TACDFM datasheet(121/142 Pages) RENESAS

121 / 142 page

R01DS0407EJ0120 Rev.1.20

Page 121 of 142

Oct 31, 2024

RX26T Group

2. Electrical Characteristics

Note 1. The conversion time is the sum of the sampling time and the comparison time. The numbers of sampling-clock cycles are

indicated as the test conditions.

Table 2.45

12-Bit A/D (Unit 0, 1, 2) Conversion Characteristics (2)

Conditions: VCC = 2.7 to 4.5 V, 3.0 V ≤ AVCC0 = AVCC1 = AVCC2 < 4.5V,

VSS = AVSS0 = AVSS1 = AVSS2 = 0 V, Ta = Topr, PCLKB = PCLKD = 8 to 40 MHz,

Source impedance = 1.0 kΩ

Item

Min.

Typ.

Max.

Unit

Test Conditions

Resolution

Bit

Analog input capacitance

—

Conversion time*1

(Operation at

PCLKD = 40 MHz)

AN000 to AN002,

AN100 to AN102

Channel-dedicated

sample-and-hold

circuits in use

Constant

sampling

enabled

1.35

—

µs

 Sampling time: 18 PCLKD

Constant

sampling

disabled

1.80

—

 Sampling time of channel-dedicated

sample-and-hold circuits: 18 PCLKD

 Sampling time: 18 PCLKD

Channel-dedicated sample-and-

hold circuits not in use

1.13

—

 Sampling time: 21 PCLKD

AN003, AN103

1.13

—

 Sampling time: 21 PCLKD

AN200 to AN211

1.20

—

 Sampling time: 24 PCLKD

AN216 to AN217

1.28

—

 Sampling time: 27 PCLKD

Offset error

Channel-dedicated sample-and-

hold circuits in use

—

±1.5

±7.5

LSB

AN000 to AN002,

AN100 to AN102 = 0.2 V

Channel-dedicated sample-and-

hold circuits not in use

—

±1.5

±6.5

Full-scale error

Channel-dedicated sample-and-

hold circuits in use

—

±1.5

±7.5

AN000 to AN002 = AVCC0 – 0.2 V

AN100 to AN102 = AVCC1 – 0.2 V

Channel-dedicated sample-and-

hold circuits not in use

—

±1.5

±6.5

Quantization error

Channel-dedicated sample-and-

hold circuits in use

—±0.5

—

Channel-dedicated sample-and-

hold circuits not in use

—±0.5

—

Absolute accuracy

AN000 to AN002,

AN100 to AN102

Channel-dedicated sample-and-

hold circuits in use

—

±4.0

±8.0

Channel-dedicated sample-and-

hold circuits not in use

—

±2.5

±7.0

AN003, AN103

—

±2.5

±7.0

AN200 to AN211

—

±2.5

±7.0

AN216 to AN217

—

±2.5

±8.0

DNL differential nonlinearity error

Channel-dedicated sample-and-

hold circuits in use

—

±1.0

±4.5

Channel-dedicated sample-and-

hold circuits not in use

—

±1.0

±3.5

INL integral nonlinearity error

Channel-dedicated sample-and-

hold circuits in use

—

±2.0

±5.0

Channel-dedicated sample-and-

hold circuits not in use

—

±1.5

±3.5

Channel-dedicated sample-and-hold characteristics of hold circuits

—

µs

Dynamic range

AN000 to AN002

Channel-dedicated sample-and-

hold circuits in use

0.2

—

AVCC0

– 0.2

AN100 to AN102

Channel-dedicated sample-and-

hold circuits in use

0.2

—

AVCC1

– 0.2

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