WM8946ECSSLASHR datasheet(71/175 Pages) WOLFSON

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Production Data

WM8946

PD, July 2012, Rev 4.3

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

DACR_SRC

Right DAC Data Source Select

0 = Right DAC outputs left interface

data

1 = Right DAC outputs right

interface data

DACL_SRC

Left DAC Data Source Select

0 = Left DAC outputs left interface

data

1 = Left DAC outputs right interface

data

BCLK_INV

BCLK Invert

0 = BCLK not inverted

1 = BCLK inverted

LRCLK_INV

LRCLK Polarity / DSP Mode A-B

select.

Right, left and I

2S modes – LRCLK

polarity

0 = Not Inverted

1 = Inverted

DSP Mode – Mode A-B select

0 = MSB is available on 2

nd BCLK

rising edge after LRCLK rising edge

(mode A)

1 = MSB is available on 1

st BCLK

rising edge after LRCLK rising edge

(mode B)

3:2

WL [1:0]

Digital Audio Interface Word Length

00 = 16 bits

01 = 20 bits

10 = 24 bits

11 = 32 bits

Note – see “Companding” for the

selection of 8-bit mode.

1:0

FMT [1:0]

Digital Audio Interface Format

00 = Reserved

01 = Left Justified

10 = I2S format

11 = DSP/PCM mode

R21 (15h)

DAC Control 1

DACR_DATINV

Right DAC Invert

0 = Right DAC output not inverted

1 = Right DAC output inverted

DACL_DATINV

Left DAC Invert

0 = Left DAC output not inverted

1 = Left DAC output inverted

R25 (19h)

ADC Control 1

ADCR_DATINV

Right ADC Invert

0 = Right ADC output not inverted

1 = Right ADC output inverted

ADCL_DATINV

Left ADC Invert

0 = Left ADC output not inverted

1 = Left ADC output inverted

Table 46 Audio Data Format Control

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