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UPSD3312D Datasheet(PDF) 188 Page - STMicroelectronics |
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UPSD3312D Datasheet(HTML) 188 Page - STMicroelectronics |
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188 / 272 page ![]() Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) PSD module UPSD33xx 188/272 Doc ID 9685 Rev 7 When using the Data Polling method during an erase operation, Figure 60 on page 188 still applies. However, the Data Polling Flag Bit (DQ7) is '0' until the erase operation is complete. A ’1’ on the Error Flag Bit (DQ5) indicates a timeout condition on the Erase cycle, a ’0’ indicates no error. The 8032 can read any location within the sector being erased to get the Data Polling Flag Bit (DQ7) and the Error Flag Bit (DQ5). PSDsoft Express generates ANSI C code functions for implementation of these Data Polling algorithms. Figure 60. Data Polling flowchart 27.4.11 Data toggle Checking the Toggle Flag Bit (DQ6) is another method of determining whether a program or erase operation is in progress or has completed. Figure 61 on page 189 shows the Data Toggle algorithm. When the 8032 issues a program instruction sequence, the embedded algorithm within the Flash memory array begins. The 8032 then reads the location of the byte to be programmed in Flash memory to check status. The Toggle Flag Bit (DQ6) of this location toggles each time the 8032 reads this location until the embedded algorithm is complete. The 8032 continues to read this location, checking the Toggle Flag Bit (DQ6) and monitoring the Error Flag Bit (DQ5). When the Toggle Flag Bit (DQ6) stops toggling (two consecutive reads yield the same value), then the embedded algorithm is complete. If the Error Flag Bit (DQ5) is '1,' the 8032 should test the Toggle Flag Bit (DQ6) again, since the Toggle Flag Bit (DQ6) may have changed simultaneously with the Error Flag Bit (DQ5) (see Figure 61 on page 189). READ DQ5 & DQ7 at VALID ADDRESS START READ DQ7 FAIL PASS AI01369B DQ7 = DATA YES NO YES NO DQ5 = 1 DQ7 = DATA YES NO |
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