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M38B53M4-059FP Datasheet(PDF) 267 Page - Mitsubishi Electric Semiconductor |
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M38B53M4-059FP Datasheet(HTML) 267 Page - Mitsubishi Electric Semiconductor |
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267 / 355 page ![]() 38B5 Group User’s Manual 3-19 APPENDIX 3.3 Notes on use 3.3.4 Notes on FLD controller q Set a value of 0316 or more to the Toff1 time set register. q When displaying in the gradation display mode, select the 16 timing mode by the timing number control bit (bit 4 of FLDC mode register (address 0EF416) = “0”). 3.3.5 Notes on A-D converter (1) Analog input pin s Make the signal source impedance for analog input low, or equip an analog input pin with an external capacitor of 0.01 µF to 1 µF. Further, be sure to verify the operation of application products on the user side. q Reason An analog input pin includes the capacitor for analog voltage comparison. Accordingly, when signals from signal source with high impedance are input to an analog input pin, charge and discharge noise generates. This may cause the A-D conversion precision to be worse. s When the P64/INT4/SBUSY1/AN10 pin is selected as analog input pin, external interrupt function (INT4) becomes invalid. (2) A-D converter power source pin The AVSS pin is A-D converter power source pin. Regardless of using the A-D conversion function or not, connect it as following : • AVSS : Connect to the VSS line q Reason If the AVSS pin is opened, the microcomputer may have a failure because of noise or others. (3) Clock frequency during A-D conversion The comparator consists of a capacity coupling, and a charge of the capacity will be lost if the clock frequency is too low. Thus, make sure the following during an A-D conversion. • f(XIN) is 250 kHz or more • Use clock divided by main clock (f(XIN)) as internal system clock. • Do not execute the STP instruction and WIT instruction 3.3.6 Notes on PWM q For PWM0 output, “L” level is output first. q After data is set to the PWM register (low-order) and the PWM register (high-order), PWM waveform corresponding to new data is output from next repetitive cycle. Fig. 3.3.5 PWM output PWM0 output data change Modified data is output from next repetitive cycle. |
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