HT66F4530 datasheet(61/224 Pages) HOLTEK

61 / 224 page

Rev. 1.00

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HT66F4530/HT66F4540/HT66F4550

A/D Flash MCU with Dual Operational Amplifiers

HT66F4530/HT66F4540/HT66F4550

A/D Flash MCU with Dual Operational Amplifiers

SLOW Mode to FAST Mode Switching

InSLOWmodethesystemclockisderivedfromfSUB.Whensystemclockisswitchedbacktothe

FASTmodefromfSUB,theCKS2~CKS0bitsshouldbesetto"000"~"110"andthenthesystemclock

willrespectivelybeswitchedtofH~fH/64.

However,iffHisnotusedinSLOWmodeandthusswitchedoff,itwilltakesometimetore-

oscillateandstabilisewhenswitchingtotheFASTmodefromtheSLOWMode.Thisismonitored

usingtheHXTFbitintheHXTCregisterortheHIRCFbitintheHIRCCregister.Thetimeduration

requiredforthehighspeedsystemoscillatorstabilizationisspecifiedintheSystemStartUpTime

Characteristics.

FAST Mode

SLOW Mode

CKS�~CKS0 = 000~110

SLEEP Mode

FHIDEN=0� FSIDEN=0

HALT inst�u�tion is exe�uted

IDLE0 Mode

FHIDEN=0� FSIDEN=1

HALT inst�u�tion is exe�uted

IDLE1 Mode

FHIDEN=1� FSIDEN=1

HALT inst�u�tion is exe�uted

IDLE2 Mode

FHIDEN=1� FSIDEN=0

HALT inst�u�tion is exe�uted

Entering the SLEEP Mode

ThereisonlyonewayforthesedevicestoentertheSLEEPModeandthatistoexecutethe"HALT"

instructionintheapplicationprogramwithboththeFHIDENandFSIDENbitsintheSCCregister

equalto"0".InthismodealltheclocksandfunctionswillbeswitchedoffexcepttheWDTfunction.

Whenthisinstructionisexecutedundertheconditionsdescribedabove,thefollowingwilloccur:

• Thesystemclockwillbestoppedandtheapplicationprogramwillstopatthe"HALT"

instruction.

• TheDataMemorycontentsandregisterswillmaintaintheirpresentcondition.

• TheI/Oportswillmaintaintheirpresentconditions.

• Inthestatusregister,thePowerDownflag,PDF,willbesetandtheWatchdogtime-outflag,TO,

willbecleared.

• TheWDTwillbeclearedandresumecountingiftheWDTfunctionisenabled.IftheWDT

functionisdisabled,theWDTwillbeclearedandthenstopped.

HT66F4530 Datasheet(PDF) 61 Page - Holtek Semiconductor Inc

HT66F4530 Datasheet(HTML) 61 Page - Holtek Semiconductor Inc

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