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HT66F4530 Datasheet(PDF) 11 Page - Holtek Semiconductor Inc |
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HT66F4530 Datasheet(HTML) 11 Page - Holtek Semiconductor Inc |
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11 / 224 page  Rev. 1.00 10 De�e��e� �1� �01� Rev. 1.00 11 De�e��e� �1� �01� HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers HT66F4530/HT66F4540/HT66F4550 A/D Flash MCU with Dual Operational Amplifiers PD1/C0PI PA�/PTCK1/AN0/A1O PD0/C0XO/SCK/SCL PC�/C0NI PC5/C1PI PC4/C1NI PC3/SDO/C1XO PC0/STP1/SCS/OSC1 PC1/STCK1/SDO/OSC� PC�/RES/PTP1/STP1I PA0/RX/ICPDA/OCDSDA PA1/SDI/SDA/STP0I PA�/TX/ICPCK/OCDSCK PA3/SCOM0/SCS/DACO PB�/SCOM1/SDI/SDA/RX PA7/STP0/AN�/A1NI PB3/AN1/A1PI PB4/CLO/A0O PD�/A0NI PD3/A0PI VSS/AVSS/IOVSS PB0/PTP0/AN3/XT1 PB1/INT1/AN4/XT� VDD/AVDD/IOVDD PA5/STCK0/RX/AN5/VREF PB�/PTCK0/TX/AN� PA4/INT0/SCOM3/SCK/SCL/VREF PB5/SCOM�/TX/AN7 HT66F4550/HT66V4550 28 SSOP-A �8 �7 �� �5 �4 �3 �� �1 �0 19 18 17 1� 15 1 � 3 4 5 � 7 8 9 10 11 1� 13 14 Note:1.Ifthepin-sharedpinfunctionshavemultipleoutputssimultaneously,thedesiredpin-sharedfunctionis determinedbythecorrespondingsoftwarecontrolbits. 2.TheOCDSDAandOCDSCKpinsareusedfortheOCDSfunctionandthusonlyexistontheHT66V45x0 devicewhichistheOCDSEVchipfortheHT66F45x0device. Pin Description Withtheexceptionofthepowerpins,allpinsonthesedevicescanbereferencedbytheirPortname, e.g.PA0,PA1etc.,whichrefertothedigitalI/Ofunctionofthepins.HoweverthesePortpinsare alsosharedwithotherfunctionsuchastheAnalogtoDigitalConverter,TimerModulepinsetc. Thefunctionofeachpinislistedinthefollowingtable,howeverthedetailsbehindhoweachpinis configurediscontainedinothersectionsofthedatasheet. AsthePinDescriptionSummarytableappliestothepackagetypewiththemostpins,notallofthe abovelistedpinsmaybepresentonpackagetypeswithsmallernumbersofpins. HT66F4530 Pin Name Function OPT I/T O/T Description PA0/ICPDA/ OCDSDA PA0 PAPU PAWU PAS0 ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high and wake-up. ICPDA — ST CMOS ICP data/add�ess OCDSDA — ST CMOS OCDS data/add�ess� fo� EV �hip only PA1/SDI/SDA/ STP0I/VREF PA1 PAPU PAWU PAS0 ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high and wake-up. SDI PAS0 IFS ST — SPI se�ial data input SDA PAS0 IFS ST NMOS I�C data line STP0I PAS0 ST — STM0 �aptu�e Input VREF PAS0 AN — A/D Conve�te� �efe�en�e voltage input PA�/ICPCK/ OCDSCK PA� PAPU PAWU PAS0 ST CMOS Gene�al pu�pose I/O. Registe� ena�led pull-high and wake-up. ICPCK — ST — ICP �lo�k pin OCDSCK — ST — OCDS �lo�k pin� fo� EV �hip only |
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