HT66F4530 datasheet(157/224 Pages) HOLTEK

157 / 224 page

Rev. 1.00

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Rev. 1.00

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HT66F4530/HT66F4540/HT66F4550

A/D Flash MCU with Dual Operational Amplifiers

HT66F4530/HT66F4540/HT66F4550

A/D Flash MCU with Dual Operational Amplifiers

Baud Rate Generator

Tosetupthespeedoftheserialdatacommunication,theUARTfunctioncontainsitsowndedicated

baudrategenerator.Thebaudrateiscontrolledbyitsowninternalfreerunning8-bittimer,the

periodofwhichisdeterminedbytwofactors.Thefirstoftheseisthevalueplacedinthebaudrate

registerBRGandthesecondisthevalueoftheBRGHbitwiththecontrolregisterUCR2.The

BRGHbitdecidesifthebaudrategeneratoristobeusedinahighspeedmodeorlowspeedmode,

whichinturndeterminestheformulathatisusedtocalculatethebaudrate.ThevalueNintheBRG

registerwhichisusedinthefollowingbaudratecalculationformuladeterminesthedivisionfactor.

NotethatNisthedecimalvalueplacedintheBRGregisterandhasarangeofbetween0and255.

UCR2 BRGH Bit

Baud Rate (BR)

fH / [�4 (N+1)]

fH / [1� (N+1)]

ByprogrammingtheBRGHbitwhichallowsselectionoftherelatedformulaandprogrammingthe

requiredvalueintheBRGregister,therequiredbaudratecanbesetup.Notethatbecausetheactual

baudrateisdeterminedusingadiscretevalue,N,placedintheBRGregister,therewillbeanerror

associatedbetweentheactualandrequestedvalue.ThefollowingexampleshowshowtheBRG

registervalueNandtheerrorvaluecanbecalculated.

Calculating the Baud Rate and Error Values

Foraclockfrequencyof4MHz,andwithBRGHclearedtozerodeterminetheBRGregistervalueN,

theactualbaudrateandtheerrorvalueforadesiredbaudrateof4800.

FromtheabovetablethedesiredbaudrateBR=fH/[64(N+1)]

Re-arrangingthisequationgivesN=[fH/(BR×64)]-1

GivingavalueforN=[4000000/(4800×64)]-1=12.0208

Toobtaintheclosestvalue,adecimalvalueof12shouldbeplacedintotheBRGregister.Thisgives

anactualorcalculatedbaudratevalueofBR=4000000/[64×(12+1)]=4808

Thereforetheerrorisequalto(4808-4800)/4800=0.16%

UART Setup and Control

Fordatatransfer,theUARTfunctionutilizesanon-return-to-zero,morecommonlyknownasNRZ,

format.Thisiscomposedofonestartbit,eightorninedatabits,andoneortwostopbits.Parity

issupportedbytheUARThardware,andcanbesetuptobeeven,oddornoparity.Forthemost

commondataformat,8databitsalongwithnoparityandonestopbit,denotedas8,N,1,isused

asthedefaultsetting,whichisthesettingatpower-on.Thenumberofdatabitsandstopbits,along

withtheparity,aresetupbyprogrammingthecorrespondingBNO,PRT,PREN,andSTOPSbits

intheUCR1register.Thebaudrateusedtotransmitandreceivedataissetupusingtheinternal

8-bitbaudrategenerator,whilethedataistransmittedandreceivedLSBfirst.AlthoughtheUART

transmitterandreceiverarefunctionallyindependent,theybothusethesamedataformatandbaud

rate.Inallcasesstopbitswillbeusedfordatatransmission.

HT66F4530 Datasheet(PDF) 157 Page - Holtek Semiconductor Inc

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