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PI7C9X760ACLEX Datasheet(PDF) 31 Page - Diodes Incorporated |
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PI7C9X760ACLEX Datasheet(HTML) 31 Page - Diodes Incorporated |
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31 / 53 page ![]() 31 www.diodes.com April 2019 Diodes Incorporated PI7C9X760 Document Number DS40305 Rev 6-2 A product Line of Diodes Incorporated PI7C9X760 6 RO RI input status Normally this bit is the complement of the RI# input. In the loopback mode this bit is equivalent to MCR[2]. 5 RO DSR input status Normally this bit is the complement of the DSR# input. In the loopback mode this bit is equivalent to MCR[0]. 4 RO CTS input status Normally this bit is the complement of the CTS# input. In the loopback mode this bit is equivalent to MCR[1]. 3 RO Delta CD# input flag 0 = No change on CD# input 1 = The CD# input has changed state. A modem status interrupt will be generated if MSR interrupt is enabled. 2 RO Delta RI# input flag 0 = No change on RI# input 1 = The RI# input has changed from a LOW to HIGH. A modem status interrupt will be generated if MSR interrupt is enabled. 1 RO Delta DSR# input flag 0 = No change on DSR# input 1 = The DSR# input has changed state. A modem status interrupt will be generated if MSR interrupt is enabled. 0 RO Delta CTS# input flag 0 = No change on CTS# input 1 = The CTS# input has changed state. A modem status interrupt will be generated if MSR interrupt is enabled. Offset 06H: Transmission Control Register (TCR). Accessible when EFR[4]=1 and MCR[2]=1 and SFR[2]=0. De- fault=00 Bit Type Description [7:4] RW RX FIFO Resume level. When the RX FIFO is less than or equal to the value (decimal value of TCR[7:4] multiplied by 4), the RTS# output will be re-asserted if Auto RTS flow is used or XON character will be transmitted if Auto XON/XOFF flow control is used. It is recommended that this value is less than the RX Trigger Level. [3:0] RW RX FIFO Halt level. When the RX FIFO is greater than or equal to the value (decimal value of TCR[3:0] multiplied by 4), the RTS# output will be de-asserted if Auto RTS flow is used or XOFF character will be transmitted if Auto XON/XOFF flow control is used. It is recommended that this value is greater than the RX Trig- ger Level. Offset 06H: XOFF1 character Register (XOFF1). Accessible when LCR=0xBF and SFR[2]=0. Default=00 Bit Type Description [7:0] RW XOFF1 character Note: It is reset only when Power-On-Reset. Configuration Registers cont.. |
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