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UPD75P3018A Datasheet(PDF) 31 Page - Renesas Technology Corp

Part # UPD75P3018A
Description  MOS INTEGRATED CIRCUIT
PDF  66 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD75P3018A Datasheet(HTML) 31 Page - Renesas Technology Corp

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µPD75P3018A
29
Data Sheet U11917EJ2V1DS
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Instruction
Mnemonic
Operand
No. of Machine
Operation
Addressing
Skip
Group
Bytes
Cycle
Area
Condition
Subroutine
PUSH
rp
1
1
(SP–1)(SP–2)
← rp, SP ← SP–2
stack control
BS
2
2
(SP–1)
← MBS, (SP–2) ← RBS, SP ← SP–2
POP
rp
1
1
rp
← (SP+1)(SP), SP ← SP+2
BS
2
2
MBS
← (SP+1), RBS ← (SP), SP ← SP+2
Interrupt
EI
2
2
IME(IPS.3)
← 1
control
IEXXX
2
2
IEXXX
← 1
DI
2
2
IME(IPS.3)
← 0
IEXXX
2
2
IEXXX
← 0
I/O
INNote 1
A, PORTn
2
2
A
← PORTn
(n=0-7)
XA, PORTn
2
2
XA
← PORTn+1, PORTn (n=4, 6)
OUTNote 1
PORTn, A
2
2
PORTn
← A
(n=2-7)
PORTn, XA
2
2
PORTn+1, PORTn
← XA (n=4, 6)
CPU control
HALT
2
2
Set HALT Mode(PCC.2
← 1)
STOP
2
2
Set STOP Mode(PCC.3
←1)
NOP
1
1
No Operation
Special
SEL
RBn
2
2
RBS
← n (n=0-3)
MBn
2
2
MBS
← n (n=0-3, 15)
GETINote 2, 3 taddr
1
3
• When using TBR instruction
*10
PC13-0
← (taddr)5-0+(taddr+1), PC14 ← 0
• When using TCALL instruction
(SP–4)(SP–1)(SP–2)
← PC11-0
(SP–3)
← MBE, RBE, PC13, 12, PC14 ← 0
PC13-0
← (taddr)5-0+(taddr+1)
SP
← SP–4
• When using instruction other than
Determined by
TBR or TCALL
referenced
Execute (taddr)(taddr+1) instructions
instruction
13
• When using TBR instruction
*10
PC13-0
← (taddr)5-0+(taddr+1), PC14 ← 0
4• When using TCALL instruction
(SP–5)
← 0, PC14-12
(SP–6)(SP–3)(SP–4)
← PC11-0
(SP–2)
← X, X, MBE, RBE, PC14 ← 0
PC13-0
← (taddr)5-0+(taddr+1)
SP
← SP–6
3• When using instruction other than
Determined by
TBR or TCALL
referenced
Execute (taddr)(taddr+1) instructions
instruction
Notes 1. Before executing the IN or OUT instruction, set MBE to 0 or 1 and set MBS to 15.
2. TBR and TCALL instructions are assembler pseudo-instructions for the GETI instruction’s table definitions.
3. Shaded areas indicate support for Mk II mode only. Other areas indicate support for Mk I mode only.
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