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UPD75P3018A Datasheet(PDF) 32 Page - Renesas Technology Corp |
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UPD75P3018A Datasheet(HTML) 32 Page - Renesas Technology Corp |
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32 / 66 page ![]() µPD75P3018A 30 Data Sheet U11917EJ2V1DS 8. ONE-TIME PROM (PROGRAM MEMORY) WRITE AND VERIFY The program memory contained in the µPD75P3018A is a 32768 × 8-bit one-time PROM that can be electrically written one time only. The pins listed in the table below are used for this one-time PROM’s write/verify operations. Clock input from the X1 pin is used instead of address input as a method for updating addresses. Pin Function VPP Pin where program voltage is applied during program memory write/verify (usually VDD potential) X1, X2 Clock input pins for address updating during program memory write/verify. Input the X1 pin’s inverted signal to the X2 pin. MD0-MD3 Operation mode selection pin for program memory write/verify D0/P40 to D3/P43 8-bit data I/O pins for program memory write/verify (low-order 4 bits) D4/P50 to D7/P53 (high-order 4 bits) VDD Pin where power supply voltage is applied. Applies VDD = 1.8 to 5.5 V in normal operation mode and +6 V for program memory write/verify. Caution Pins not used for program memory write/verify should be connected to VSS via a resistor individually. 8.1 Operation Modes for Program Memory Write/Verify When +6 V is applied to the VDD pin and +12.5 V to the VPP pin, the µPD75P3018A enters the program memory write/verify mode. The following operation modes can be specified by setting pins MD0 to MD3 as shown below. Operation Mode Specification Operation Mode VPP VDD MD0 MD1 MD2 MD3 +12.5 V +6 V H L H L Zero-clear program memory address LH HH Write mode LLH H Verify mode HX HH Program inhibit mode X: L or H |
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