UPD75P3018A datasheet(38/66 Pages) RENESAS

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µPD75P3018A

Data Sheet U11917EJ2V1DS

Subsystem Clock Oscillator Characteristics (TA = –40 to +85

°C, VDD = 1.8 to 5.5 V)

Resonator

Recommended Circuit

Parameter

Conditions

MIN.

TYP.

MAX.

Unit

Crystal

Oscillation frequency

32.768

kHz

resonator

(fXT)Note 1

Oscillation

VDD = 4.5 to 5.5 V

1.0

stabilization timeNote 2

External

XT1 input frequency

100

kHz

clock

(fXT)Note 1

XT1 input high-/

µs

low-level width

(tXTH, tXTL)

Notes 1. The oscillation frequency and XT1 input frequency shown above indicate characteristics of the oscillator only.

For the instruction execution time, refer to AC Characteristics.

2. The oscillation stabilization time is the time required for oscillation to be stabilized after VDD has been applied.

Caution

When using the subsystem clock oscillator , wire the portion enclosed in the broken line in the above

figure as follows to prevent adverse influence due to wiring capacitance:

• Keep the wiring length as short as possible.

• Do not cross the wiring with other signal lines.

• Do not route the wiring in the vicinity of a line through which a high alternating current flows.

• Always keep the ground point of the capacitor of the oscillator at the same potential as VDD.

• Do not ground to a power supply pattern through which a high current flows.

• Do not extract signals from the oscillator.

The subsystem clock oscillator has a low amplification factor to reduce current consumption and is

more susceptible to noise than the main system clock oscillator. Therefore, exercise utmost care in

wiring the subsystem clock oscillator.

Remark

For the resonator selection and oscillator constant, customers are requested to either evaluate the oscillation

themselves or apply to the resonator manufacturer for evaluation.

XT1

XT2

VDD

XT1

XT2

UPD75P3018A Datasheet(PDF) 38 Page - Renesas Technology Corp

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