AMD-K6-2ESLASH233AMZ datasheet(235/332 Pages) AMD

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Chapter 11

System Management Mode (SMM)

217

22529B/0—January 2000

AMD-K6™-2E Processor Data Sheet

Preliminary Information

System Management Mode (SMM)

SMM is an alternate operating mode entered by way of a system

management interrupt (SMI) and handled by an interrupt

service routine. SMM is designed for system control activities

s u ch as pow e r manag e ment. Th e s e activi tie s appear

transparent to conventional operating systems like DOS and

Windows. SMM is primarily targeted for use by the Basic Input

Output System (BIOS) and specialized low-level device drivers.

The code and data for SMM are stored in the SMM memory

area, which is isolated from main memory.

The processor enters SMM by the system logic’s assertion of the

SMI# interrupt and the processor’s acknowledgment by the

assertion of SMIACT#. At this point the processor saves its state

into the SMM memory state-save area and jumps to the SMM

service routine. The processor returns from SMM when it

executes the resume (RSM) instruction from within the SMM

service routine. Subsequently, the processor restores its state

from the SMM save area, negates SMIACT#, and resumes

execution with the instruction following the point where it

entered SMM.

The following sections summarize the SMM state-save area,

entry into and exit from SMM, exceptions and interrupts in

SMM, memory allocation and addressing in SMM, and the SMI#

and SMIACT# signals.

11.1

SMM Operating Mode and Default Register Values

The software environment within SMM has the following

characteristics:

Addressing and operation in real mode

4-Gbyte segment limits

Default 16-bit operand, address, and stack sizes, although

instruction prefixes can override these defaults

Control transfers that do not override the default operand

size truncate the EIP to 16 bits

Far jumps or calls cannot transfer control to a segment with

a base address requiring more than 20 bits, as in real mode

segment-base addressing

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