AMD-K6-2ESLASH233AMZ datasheet(254/332 Pages) AMD

254 / 332 page

236

Test and Debug

Chapter 12

AMD-K6™-2E Processor Data Sheet

22529B/0—January 2000

Preliminary Information

SAMPLE/PRELOAD Instruction. The SAMPLE/PRELOAD instruction

performs two functions. These functions are as follows:

During the Capture-DR state, the processor loads the BSR

shift register with the current state of every input, output,

and bidirectional pin.

During the Update-DR state, the BSR output register is

loaded from the BSR shift register in preparation for the

next EXTEST instruction.

The SAMPLE/PRELOAD instruction does not affect the normal

operational state of the processor.

BYPASS Instruction. The BYPASS instruction selects the BR

processor from 281 to one (TDI to BR to TDO). The BYPASS

instruction does not affect the normal operational state of the

processor.

IDCODE Instruction. The IDCODE instruction selects the DIR

out of the processor. This instruction is loaded into the IR when

the TAP controller is reset. The IDCODE instruction does not

affect the normal operational state of the processor.

HIGHZ Instruction. The HIGHZ instruction forces all output and

bidirectional pins to be floated. During this instruction, the BR

is selected and the normal operational state of the processor is

not affected.

TAP Controller State

Machine

The TAP controller state diagram is shown in Figure 82 on page

237. State transitions occur on the rising edge of TCK. The logic

0 or 1 next to the states represents the value of the TMS signal

sampled by the processor on the rising edge of TCK.

AMD-K6-2E/233AMZ Datasheet(PDF) 254 Page - Advanced Micro Devices