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MC68HC908GR4MP Datasheet(PDF) 229 Page - Freescale Semiconductor, Inc |
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MC68HC908GR4MP Datasheet(HTML) 229 Page - Freescale Semiconductor, Inc |
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229 / 286 page ![]() MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7 Freescale Semiconductor 229 Chapter 22 Timer Interface Module (TIM) 22.1 Introduction This section describes the timer interface (TIM) module. The TIM on this part is a 2-channel and a1-channel timer that provides a timing reference with input capture, output compare, and pulse-width-modulation functions. Figure 22-1 is a block diagram of the TIM. This particular MCU has two timer interface modules which are denoted as TIM1 and TIM2. For further information regarding timers on M68HC08 family devices, please consult the HC08 Timer Reference Manual, TIM08RM/AD. 22.2 Features Features of the TIM include: • Three input capture/output compare channels: – Rising-edge, falling-edge, or any-edge input capture trigger – Set, clear, or toggle output compare action • Buffered and unbuffered pulse-width-modulation (PWM) signal generation • Programmable TIM clock input with 7-frequency internal bus clock prescaler selection • Free-running or modulo up-count operation • Toggle any channel pin on overflow • TIM counter stop and reset bits 22.3 Pin Name Conventions The text that follows describes both timers, TIM1 and TIM2. The TIM input/output (I/O) pin names are T[1,2]CH0 (timer 1 channel 0, timer 2 channel 0) and T[1]CH1 (timer channel 1), where “1” is used to indicate TIM1 and “2” is used to indicate TIM2. The two TIMs share three I/O pins with three port D I/O port pins. The full names of the TIM I/O pins are listed in Table 22-1. The generic pin names appear in the text that follows. Table 22-1. Pin Name Conventions TIM Generic Pin Names: T[1,2]CH0 T[1,2]CH1 Full TIM Pin Names: TIM1 PTD4/ATD12/T1CH0 PTD5/T1CH1 TIM2 PTD6/ATD14/T2CH0 — |
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