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MC68HC908GR4MP Datasheet(PDF) 230 Page - Freescale Semiconductor, Inc |
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MC68HC908GR4MP Datasheet(HTML) 230 Page - Freescale Semiconductor, Inc |
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230 / 286 page ![]() Timer Interface Module (TIM) MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7 230 Freescale Semiconductor NOTE References to either timer 1 or timer 2 may be made in the following text by omitting the timer number. For example, TCH0 may refer generically to T1CH0 and T2CH0, and TCH1 will refer to T1CH1. NOTE The Timer Interface Module in MC68HC908GR8 is constructed by TIM1 which contains channel 0 and 1, and TIM2 which contains channel 0 only. 22.4 Functional Description Figure 22-1 shows the structure of the TIM. The central component of the TIM is the 16-bit TIM counter that can operate as a free-running counter or a modulo up-counter. The TIM counter provides the timing reference for the input capture and output compare functions. The TIM counter modulo registers, TMODH:TMODL, control the modulo value of the TIM counter. Software can read the TIM counter value at any time without affecting the counting sequence. The TIM channels (per timer) are programmable independently as input capture or output compare channels. If a channel is configured as input capture, then an internal pullup device may be enabled for that channel. See Port D Input Pullup Enable Register. In Figure 22-1, channel1 will only be available in TIM1 while channel 0 will be available in both TIM1 and TIM2. Figure 22-2 summarizes the timer registers. 22.4.1 TIM Counter Prescaler The TIM clock source can be one of the seven prescaler outputs. The prescaler generates seven clock rates from the internal bus clock. The prescaler select bits, PS[2:0], in the TIM status and control register select the TIM clock source. 22.4.2 Input Capture With the input capture function, the TIM can capture the time at which an external event occurs. When an active edge occurs on the pin of an input capture channel, the TIM latches the contents of the TIM counter into the TIM channel registers, TCHxH:TCHxL. The polarity of the active edge is programmable. Input captures can generate TIM CPU interrupt requests. 22.4.3 Output Compare With the output compare function, the TIM can generate a periodic pulse with a programmable polarity, duration, and frequency. When the counter reaches the value in the registers of an output compare channel, the TIM can set, clear, or toggle the channel pin. Output compares can generate TIM CPU interrupt requests. |
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