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MC68HC908GR4MP Datasheet(PDF) 243 Page - Freescale Semiconductor, Inc

Part # MC68HC908GR4MP
Description  M68HC08 Microcontrollers
PDF  286 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC68HC908GR4MP Datasheet(HTML) 243 Page - Freescale Semiconductor, Inc

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I/O Registers
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
Freescale Semiconductor
243
When ELSxB:A = 00, this read/write bit selects the initial output level of the TCHx pin. See Table 22-3.
Reset clears the MSxA bit.
1 = Initial output level low
0 = Initial output level high
NOTE
Before changing a channel function by writing to the MSxB or MSxA bit, set
the TSTOP and TRST bits in the TIM status and control register (TSC).
ELSxB and ELSxA — Edge/Level Select Bits
When channel x is an input capture channel, these read/write bits control the active edge-sensing logic
on channel x.
When channel x is an output compare channel, ELSxB and ELSxA control the channel x output
behavior when an output compare occurs.
When ELSxB and ELSxA are both clear, channel x is not connected to port D, and pin PTDx/TCHx is
available as a general-purpose I/O pin. Table 22-3 shows how ELSxB and ELSxA work. Reset clears
the ELSxB and ELSxA bits.
NOTE
Before enabling a TIM channel register for input capture operation, make
sure that the PTD/TCHx pin is stable for at least two bus clocks.
TOVx — Toggle On Overflow Bit
When channel x is an output compare channel, this read/write bit controls the behavior of the channel
x output when the TIM counter overflows. When channel x is an input capture channel, TOVx has no
effect. Reset clears the TOVx bit.
1 = Channel x pin toggles on TIM counter overflow.
0 = Channel x pin does not toggle on TIM counter overflow.
NOTE
When TOVx is set, a TIM counter overflow takes precedence over a
channel x output compare if both occur at the same time.
Table 22-3. Mode, Edge, and Level Selection
MSxB
MSxA
ELSxB
ELSxA
Mode
Configuration
X0
0
0
Output preset
Pin under port control; initial output level high
X
1
0
0
Pin under port control; initial output level low
00
0
1
Input capture
Capture on rising edge only
0
0
1
0
Capture on falling edge only
0
0
1
1
Capture on rising or falling edge
01
0
0
Output compare
or PWM
Software compare only
0
1
0
1
Toggle output on compare
0
1
1
0
Clear output on compare
0
1
1
1
Set output on compare
1X
0
1
Buffered output
compare or
buffered PWM
Toggle output on compare
1
X
1
0
Clear output on compare
1
X
1
1
Set output on compare



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