MC68HC908GR4MP datasheet(264/286 Pages) FREESCALE

264 / 286 page

Electrical Specifications

MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

264

Freescale Semiconductor

23.13 5.0 V SPI Characteristics

Diagram

Number(1)

1. Numbers refer to dimensions in Figure 23-16 and Figure 23-17.

Characteristic(2)

2. All timing is shown with respect to 20% VDD and 70% VDD, unless noted; 100 pF load on all SPI pins.

Symbol

Min

Max

Unit

Operating frequency

Master

Slave

fOP(M)

fOP(S)

fOP/128

fOP/2

fOP

MHz

Cycle time

Master

Slave

tCYC(M)

tCYC(S)

128

—

tcyc

Enable lead time

tLead(S)

1—

tcyc

Enable lag time

tLag(S)

1—

tcyc

Clock (SPSCK) high time

Master

Slave

tSCKH(M)

tSCKH(S)

tcyc –25

1/2 tcyc –25

64 tcyc

—

Clock (SPSCK) low time

Master

Slave

tSCKL(M)

tSCKL(S)

tcyc –25

1/2 tcyc –25

64 tcyc

—

Data setup time (inputs)

Master

Slave

tSU(M)

tSU(S)

—

Data hold time (inputs)

Master

Slave

tH(M)

tH(S)

—

Access time, slave(3)

CPHA = 0

CPHA = 1

3. Time to data active from high-impedance state

tA(CP0)

tA(CP1)

Disable time, slave(4)

4. Hold time to high-impedance state

tDIS(S)

—40

Data valid time, after enable edge

Master

Slave(5)

5. With 100 pF on all SPI pins

tV(M)

tV(S)

—

Data hold time, outputs, after enable edge

Master

Slave

tHO(M)

tHO(S)

—

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