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MC68HC908GR4MP Datasheet(PDF) 106 Page - Freescale Semiconductor, Inc |
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MC68HC908GR4MP Datasheet(HTML) 106 Page - Freescale Semiconductor, Inc |
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106 / 286 page  Central Processing Unit (CPU) MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7 106 Freescale Semiconductor ORA #opr ORA opr ORA opr ORA opr,X ORA opr,X ORA ,X ORA opr,SP ORA opr,SP Inclusive OR A and M A ← (A) | (M) 0 – – – IMM DIR EXT IX2 IX1 IX SP1 SP2 AA BA CA DA EA FA 9EEA 9EDA ii dd hh ll ee ff ff ff ee ff 2 3 4 4 3 2 4 5 PSHA Push A onto Stack Push (A); SP ← (SP) – 1 –––– –– INH 87 2 PSHH Push H onto Stack Push (H); SP ← (SP) – 1 –––– –– INH 8B 2 PSHX Push X onto Stack Push (X); SP ← (SP) – 1 –––– –– INH 89 2 PULA Pull A from Stack SP ← (SP + 1); Pull (A) –––– –– INH 86 2 PULH Pull H from Stack SP ← (SP + 1); Pull (H) –––– –– INH 8A 2 PULX Pull X from Stack SP ← (SP + 1); Pull (X) –––– –– INH 88 2 ROL opr ROLA ROLX ROL opr,X ROL ,X ROL opr,SP Rotate Left through Carry –– DIR INH INH IX1 IX SP1 39 49 59 69 79 9E69 dd ff ff 4 1 1 4 3 5 ROR opr RORA RORX ROR opr,X ROR ,X ROR opr,SP Rotate Right through Carry –– DIR INH INH IX1 IX SP1 36 46 56 66 76 9E66 dd ff ff 4 1 1 4 3 5 RSP Reset Stack Pointer SP ← $FF –––– –– INH 9C 1 RTI Return from Interrupt SP ← (SP) + 1; Pull (CCR) SP ← (SP) + 1; Pull (A) SP ← (SP) + 1; Pull (X) SP ← (SP) + 1; Pull (PCH) SP ← (SP) + 1; Pull (PCL) INH 80 7 RTS Return from Subroutine SP ← SP + 1; Pull (PCH) SP ← SP + 1; Pull (PCL) –––– –– INH 81 4 SBC #opr SBC opr SBC opr SBC opr,X SBC opr,X SBC ,X SBC opr,SP SBC opr,SP Subtract with Carry A ← (A) – (M) – (C) –– IMM DIR EXT IX2 IX1 IX SP1 SP2 A2 B2 C2 D2 E2 F2 9EE2 9ED2 ii dd hh ll ee ff ff ff ee ff 2 3 4 4 3 2 4 5 SEC Set Carry Bit C ← 1 –––– –1 INH 99 1 SEI Set Interrupt Mask I ← 1 ––1– –– INH 9B 2 STA opr STA opr STA opr,X STA opr,X STA ,X STA opr,SP STA opr,SP Store A in M M ← (A) 0–– – DIR EXT IX2 IX1 IX SP1 SP2 B7 C7 D7 E7 F7 9EE7 9ED7 dd hh ll ee ff ff ff ee ff 3 4 4 3 2 4 5 STHX opr Store H:X in M (M:M + 1) ← (H:X) 0 – – – DIR 35 dd 4 STOP Enable Interrupts, Stop Processing, Refer to MCU Documentation I ← 0; Stop Processing ––0– –– INH 8E 1 STX opr STX opr STX opr,X STX opr,X STX ,X STX opr,SP STX opr,SP Store X in M M ← (X) 0–– – DIR EXT IX2 IX1 IX SP1 SP2 BF CF DF EF FF 9EEF 9EDF dd hh ll ee ff ff ff ee ff 3 4 4 3 2 4 5 Table 10-1. Instruction Set Summary (Sheet 5 of 6) Source Form Operation Description Effect on CCR VH I N Z C C b0 b7 b0 b7 C |
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