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MC68HC908GR4MP Datasheet(PDF) 110 Page - Freescale Semiconductor, Inc |
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MC68HC908GR4MP Datasheet(HTML) 110 Page - Freescale Semiconductor, Inc |
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110 / 286 page ![]() Flash Memory MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7 110 Freescale Semiconductor 11.3 FLASH Control Register The FLASH control register (FLCR) controls FLASH program and erase operations. HVEN — High-Voltage Enable Bit This read/write bit enables the charge pump to drive high voltages for program and erase operations in the array. HVEN can only be set if either PGM = 1 or ERASE = 1 and the proper sequence for program or erase is followed. 1 = High voltage enabled to array and charge pump on 0 = High voltage disabled to array and charge pump off MASS — Mass Erase Control Bit Setting this read/write bit configures the 8K byte FLASH array for mass erase operation. 1 = MASS erase operation selected 0 = MASS erase operation unselected ERASE — Erase Control Bit This read/write bit configures the memory for erase operation. ERASE is interlocked with the PGM bit such that both bits cannot be equal to 1 or set to 1 at the same time. 1 = Erase operation selected 0 = Erase operation unselected PGM — Program Control Bit This read/write bit configures the memory for program operation. PGM is interlocked with the ERASE bit such that both bits cannot be equal to 1 or set to 1 at the same time. 1 = Program operation selected 0 = Program operation unselected 11.4 FLASH Page Erase Operation Use this step-by-step procedure to erase a page (64 bytes) of FLASH memory. A page consists of 64 consecutive bytes starting from addresses $XX00, $XX40, $XX80, or $XXC0. The user interrupt vector area also forms a page. Any FLASH memory page can be erased alone. 1. Set the ERASE bit, and clear the MASS bit in the FLASH control register. 2. Read the FLASH block protect register. 3. Write any data to any FLASH address within the page address range desired. 4. Wait for a time, tnvs (min. 10μs) 5. Set the HVEN bit. 6. Wait for a time, tErase (min. 1ms) 7. Clear the ERASE bit. Address: $FE08 Bit 7 654321 Bit 0 Read: 0000 HVEN MASS ERASE PGM Write: Reset: 00000000 = Unimplemented Figure 11-1. FLASH Control Register (FLCR) |
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