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RA4L1 Datasheet(PDF) 4 Page - Renesas Technology Corp |
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RA4L1 Datasheet(HTML) 4 Page - Renesas Technology Corp |
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4 / 125 page ![]() Table 1.7 Timers (2 of 2) Feature Functional description Realtime Clock (RTC) The Realtime Clock (RTC) has two operation modes, normal operation mode and low- consumption clock mode. In each of the operation mode, the RTC has two counting modes, calendar count mode and binary count mode, that are used by switching register settings. For calendar count mode, the RTC has a 100-year calendar from 2000 to 2099 and automatically adjusts dates for leap years. For binary count mode, the RTC counts seconds and retains the information as a serial value. Binary count mode can be used for calendars other than the Gregorian (Western) calendar. Watchdog Timer (WDT) The Watchdog Timer (WDT) is a 14-bit down counter that can be used to reset the MCU when the counter underflows because the system has run out of control and is unable to refresh the WDT. In addition, the WDT can be used to generate a non-maskable interrupt or an underflow interrupt. Independent Watchdog Timer (IWDT) The Independent Watchdog Timer (IWDT) consists of a 14-bit down counter that must be serviced periodically to prevent counter underflow. The IWDT provides functionality to reset the MCU or to generate a non-maskable interrupt or an underflow interrupt. Because the timer operates with an independent, dedicated clock source, it is particularly useful in returning the MCU to a known state as a fail-safe mechanism when the system runs out of control. The IWDT can be triggered automatically by a reset, underflow, refresh error, or a refresh of the count value in the registers. Table 1.8 Communication interfaces (1 of 2) Feature Functional description Serial Communications Interface (SCI) The Serial Communications Interface (SCI) × 6 channels have asynchronous and synchronous serial interfaces: ● Asynchronous interfaces (UART and Asynchronous Communications Interface Adapter (ACIA)) ● 8-bit clock synchronous interface ● Simple IIC (master-only) ● Simple SPI ● Smart card interface ● Manchester interface ● Simple LIN The smart card interface complies with the ISO/IEC 7816-3 standard for electronic signals and transmission protocol. SCIn (n = 0, 3 to 5, 9) has FIFO buffers to enable continuous and full-duplex communication, and the data transfer speed can be configured independently using an on-chip baud rate generator. IrDA Interface The IrDA interface sends and receives IrDA data communication waveforms in cooperation with the SCI5 based on the IrDA (Infrared Data Association) standard 1.0. I2C bus interface (IIC) The I2C bus interface (IIC) has one channel. The IIC module conforms with and provides a subset of the NXP I2C (Inter-Integrated Circuit) bus interface functions. I3C bus interface (I3C) The I3C bus interface (I3C) has one channel. The I3C module conforms with and provides a subset of the NXP I2C (Inter-Integrated Circuit) bus interface functions and a subset of the MIPI I3C. Serial Interface UARTA (UARTA) The serial interface UARTA (UARTA) has two channels. The UARTA supports the following modes: ● Operation stop mode ● UART mode Serial Peripheral Interface (SPI) The Serial Peripheral Interface (SPI) has one channel. The SPI provides high-speed full-duplex synchronous serial communications with multiple processors and peripheral devices. Control Area Network with Flexible Data-Rate Module (CAN-FD) The CAN with Flexible Data-Rate (CANFD) module can handle classical CAN frames and CANFD frames complied with ISO 11898-1 standard. The module supports 4 transmit buffers and 16 receive buffers. USB 2.0 Full-Speed module (USBFS) The USB 2.0 Full-Speed module (USBFS) can operate as a host controller or device controller. The module supports full-speed and low-speed (host controller only) transfer as defined in Universal Serial Bus Specification 2.0. The module has an internal USB transceiver and supports all of the transfer types defined in Universal Serial Bus Specification 2.0. The USB has buffer memory for data transfer, providing a maximum of 10 pipes. Pipes 1 to 9 can be assigned any endpoint number based on the peripheral devices used for communication or based on your system. RA4L1 Datasheet 1. Overview R01DS0447EJ0131 Rev.1.31 May 26, 2026 Page 4 of 125 |
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